Ankur Sharma

Orcid: 0000-0003-4759-8663

Affiliations:
  • Mentor Graphics, Fremont, CA, USA
  • Iowa State University, Department of Electrical and Computer Engineering, Ames, IA, USA


According to our database1, Ankur Sharma authored at least 6 papers between 2015 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
Integrating LR Gate Sizing in an Industrial Place-and-Route Flow.
Proceedings of the ISPD 2022: International Symposium on Physical Design, Virtual Event, Canada, March 27, 2022

2020
Fast Lagrangian Relaxation-Based Multithreaded Gate Sizing Using Simple Timing Calibrations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2019
Lagrangian Relaxation Based Gate Sizing With Clock Skew Scheduling - A Fast and Effective Approach.
Proceedings of the 2019 International Symposium on Physical Design, 2019

2017
Rapid gate sizing with fewer iterations of Lagrangian Relaxation.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

2015
Fast Lagrangian Relaxation Based Gate Sizing using Multi-Threading.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Gate Sizing and Vth Assignment for Asynchronous Circuits Using Lagrangian Relaxation.
Proceedings of the 21st IEEE International Symposium on Asynchronous Circuits and Systems, 2015


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