Ankit Jindal

According to our database, Ankit Jindal authored at least 9 papers between 2016 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

ELURA: A Methodology for Post-Silicon Gate-Level Error Localization Using Regression Analysis.

Ankit Jindal, Binod Kumar, Kanad Basu, Masahiro Fujita

Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

Silicon Debug with Maximally Expanded Internal Observability Using Nearest Neighbor Algorithm.

Ankit Jindal, Binod Kumar, Nitish Jindal, Masahiro Fujita, Virendra Singh

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

2017

A Methodology for Trace Signal Selection to Improve Error Detection in Post-Silicon Validation.

Binod Kumar, Ankit Jindal, Virendra Singh, Masahiro Fujita

Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

Improving post-silicon error detection with topological selection of trace signals.

Binod Kumar, Kanad Basu, Ankit Jindal, Masahiro Fujita, Virendra Singh

Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017

A Formal Perspective on Effective Post-silicon Debug and Trace Signal Selection.

Binod Kumar, Kanad Basu, Ankit Jindal, Brajesh Pandey, Masahiro Fujita

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

Post-silicon observability enhancement with topology based trace signal selection.

Binod Kumar, Ankit Jindal, Masahiro Fujita, Virendra Singh

Proceedings of the 18th IEEE Latin American Test Symposium, 2017

Revisiting random access scan for effective enhancement of post-silicon observability.

Binod Kumar, Ankit Jindal, Jaynarayan T. Tudu, Brajesh Pandey, Virendra Singh

Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

Combining Restorability and Error Detection Ability for Effective Trace Signal Selection.

Binod Kumar, Ankit Jindal, Masahiro Fujita, Virendra Singh

Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

2016

A trace signal selection algorithm for improved post-silicon debug.

Binod Kumar, Ankit Jindal, Virendra Singh

Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016