Anjana Balachandran

According to our database1, Anjana Balachandran authored at least 5 papers between 2016 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

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Bibliography

2020
Efficient Functional Locking of Behavioral IPs.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

2019
Learning-Based Diversity Estimation: Leveraging the Power of High-Level Synthesis to Mitigate Common-Mode Failure.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019

Efficient Hardware Acceleration for Design Diversity Calculation to Mitigate Common Mode Failures.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

Common-Mode Failure Mitigation: Increasing Diversity through High-Level Synthesis.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2016
On Time Redundancy of Fault Tolerant C-Based MPSoCs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016


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