Anirudh M. Kaushik

Orcid: 0000-0002-8347-0109

According to our database1, Anirudh M. Kaushik authored at least 20 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
High Performance and Predictable Shared Last-level Cache for Safety-Critical Systems.
ACM Trans. Embed. Comput. Syst., November, 2024

2023
Predictable GPU Wavefront Splitting for Safety-Critical Systems.
ACM Trans. Embed. Comput. Syst., October, 2023

ZeroCost-LLC: Shared LLCs at No Cost to WCL.
Proceedings of the 29th IEEE Real-Time and Embedded Technology and Applications Symposium, 2023

2022
Automatic Construction of Predictable and High-Performance Cache Coherence Protocols for Multicore Real-Time Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

2021
Timing Predictable and High-Performance Hardware Cache Coherence Mechanisms for Real-Time Multi-Core Platforms.
PhD thesis, 2021

Designing Predictable Cache Coherence Protocols for Multi-Core Real-Time Systems.
IEEE Trans. Computers, 2021

Gretch: A Hardware Prefetcher for Graph Analytics.
ACM Trans. Archit. Code Optim., 2021

A Hardware Platform for Exploring Predictable Cache Coherence Protocols for Real-time Multicores.
Proceedings of the 27th IEEE Real-Time and Embedded Technology and Applications Symposium, 2021

A Systematic Approach to Achieving Tight Worst-Case Latency and High-Performance Under Predictable Cache Coherence.
Proceedings of the 27th IEEE Real-Time and Embedded Technology and Applications Symposium, 2021

Automated Synthesis of Predictable and High-Performance Cache Coherence Protocols.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2019
Enabling Predictable, Simultaneous and Coherent Data Sharing in Mixed Criticality Systems.
Proceedings of the IEEE Real-Time Systems Symposium, 2019

CARP: A Data Communication Mechanism for Multi-core Mixed-Criticality Systems.
Proceedings of the IEEE Real-Time Systems Symposium, 2019

Optimizing Hyperplane Sweep Operations Using Asynchronous Multi-grain GPU Tasks.
Proceedings of the IEEE International Symposium on Workload Characterization, 2019

2018
Exposing Implementation Details of Embedded DRAM Memory Controllers through Latency-based Analysis.
ACM Trans. Embed. Comput. Syst., 2018

2017
HourGlass: Predictable Time-based Cache Coherence Protocol for Dual-Critical Multi-Core Systems.
CoRR, 2017

Predictable Cache Coherence for Multi-core Real-Time Systems.
Proceedings of the 2017 IEEE Real-Time and Embedded Technology and Applications Symposium, 2017

2015
Reverse-engineering embedded memory controllers through latency-based analysis.
Proceedings of the 21st IEEE Real-Time and Embedded Technology and Applications Symposium, 2015

2013
Systemc-clang: An open-source framework for analyzing mixed-abstraction SystemC models.
Proceedings of the 2013 Forum on specification and Design Languages, 2013

On the use of GP-GPUs for accelerating compute-intensive EDA applications.
Proceedings of the Design, Automation and Test in Europe, 2013

2012
Accelerating SystemC simulations using GPUs.
Proceedings of the 2012 IEEE International High Level Design Validation and Test Workshop, 2012


  Loading...