Aniruddha Shastri

Orcid: 0000-0002-0235-6380

According to our database1, Aniruddha Shastri authored at least 3 papers between 2013 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2017
A High-Level Synthesis Scheduling and Binding Heuristic for FPGA Fault Tolerance.
Int. J. Reconfigurable Comput., 2017

2015
A scheduling and binding heuristic for high-level synthesis of fault-tolerant FPGA applications.
Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015

2013
An approach to complement electronics courses using virtual environment.
Proceedings of the IEEE Global Engineering Education Conference, 2013


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