Aniruddha Kanhe
Orcid: 0000-0002-3674-2968
According to our database1,
Aniruddha Kanhe
authored at least 13 papers
between 2011 and 2024.
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Bibliography
2024
A two stage pipeline architecture for hardware implementation of multi-level decomposition of 1-D framelet transform.
Microprocess. Microsystems, 2024
2023
An Adaptive Embedding Approach for High Imperceptible and Robust Audio Watermarking Using Framelet Transform and SVD.
Circuits Syst. Signal Process., 2023
2022
FPGA architecture to perform symmetric extension on signals for handling border discontinuities in FIR filtering.
Comput. Electr. Eng., 2022
2020
Speech emotion recognition using cepstral features extracted with novel triangular filter banks based on bark and ERB frequency scales.
Digit. Signal Process., 2020
Digital Architecture for Instantaneous V/UV/S Classification of Noise Free Speech Segments.
Proceedings of the 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020
Proceedings of the 11th International Conference on Computing, 2020
2019
Recognition of Spoken Languages from Acoustic Speech Signals Using Fourier Parameters.
Circuits Syst. Signal Process., 2019
Circuits Syst. Signal Process., 2019
2018
EURASIP J. Audio Speech Music. Process., 2018
Circuits Syst. Signal Process., 2018
2016
Proceedings of the International Conference on Informatics and Analytics, 2016
2015
Robust Audio steganography based on Advanced Encryption standards in temporal domain.
Proceedings of the 2015 International Conference on Advances in Computing, 2015
2011
Design and Implementation of the Low Power 0.64mW, 380 KHz Continuous Time Sigma Delta ADC.
Proceedings of the 4th International Conference on Emerging Trends in Engineering and Technology, 2011