Anilkumar Chappa

According to our database, Anilkumar Chappa authored at least 4 papers between 2020 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Highly resilient 17-level fault-tolerant multilevel inverter topology with reduced capacitor size.

Anilkumar Chappa, Shubhrata Gupta, Lalit Kumar Sahu, Krishna Kumar Gupta, Allamsetty Hema Chander

Int. J. Circuit Theory Appl., June, 2024

2022

Fault-Tolerant Asymmetrical Multilevel Inverter With Preserved Output Power Under Post-Fault Operation.

Anilkumar Chappa, Shubhrata Gupta, Lalit Kumar Sahu, Krishna Kumar Gupta, Hani Vahedi

IEEE Trans. Ind. Electron., 2022

2021

A Fault-Tolerant Multilevel Inverter Topology With Preserved Output Power and Voltage Levels Under Pre- and Postfault Operation.

Anilkumar Chappa, Shubhrata Gupta, Lalit Kumar Sahu, Krishna Kumar Gupta

IEEE Trans. Ind. Electron., 2021

2020

A Nine-Level Inverter Topology with Equal Source Utilization.

Anilkumar Chappa, Shubhrata Gupta, Lalit Kumar Sahu, Krishna Kumar Gupta

Proceedings of the 46th Annual Conference of the IEEE Industrial Electronics Society, 2020