Angelo Dati

According to our database, Angelo Dati authored at least 4 papers between 1997 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2014

Analysis and Design of a Power-Scalable Continuous-Time FIR Equalizer for 10 Gb/s to 25 Gb/s Multi-Mode Fiber EDC in 28 nm LP CMOS.

Enrico Mammei, Fabrizio Loi, Francesco Radice, Angelo Dati, Melchiorre Bruccoleri, Matteo Bassi, Andrea Mazzanti

IEEE J. Solid State Circuits, 2014

8.3 A power-scalable 7-tap FIR equalizer with tunable active delay line for 10-to-25Gb/s multi-mode fiber EDC in 28nm LP-CMOS.

Enrico Mammei, Fabrizio Loi, Francesco Radice, Angelo Dati, Melchiorre Bruccoleri, Matteo Bassi, Andrea Mazzanti

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2000

A 450 Mbit/s parallel read/write channel with parity check and 16-state time variant Viterbi.

Giacomino Bollati, Angelo Dati, Giorgio Betti, Ivan Bietti, Francesco Brianti, Melchiorre Bruccoleri, M. Coltella, P. Demartini, Marco Demicheli, Paolo Gadducci, Stefano Marchese, Daniele Ottini, Valerio Pisati, Francesco Rezzi, A. Rossi, P. Savo, C. Tonci, Rinaldo Castello

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1997

A 200-MSample/s trellis-coded PRML read/write channel with analog adaptive equalizer and digital servo.

Roberto Alini, Giorgio Betti, Ivan Bietti, Giacomino Bollati, Francesco Brianti, Angelo Dati, Marco Demicheli, Paolo Gadducci, Stefano Marchese, Emanuele Marconetti, Valerio Pisati, Maurizio Zuffada, Rinaldo Castello, Fereidoon Heydari, Peter Gillen, Gerry Maguire, Marcus Marrow, Stephen McDonagh, Fergus O'Brien, Jerry O'Brien, Niall O'hEarcain, Deirdre Reddy, Lisa Fredrickson, Dennis Stone, LeRoy Volz

IEEE J. Solid State Circuits, 1997