Angeles G. Navarro

Orcid: 0000-0002-4140-2589

Affiliations:
  • University of Málaga, Spain


According to our database1, Angeles G. Navarro authored at least 63 papers between 1997 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
CPU and GPU oriented optimizations for LiDAR data processing.
J. Comput. Sci., 2024

2023
SkyFlow: Heterogeneous streaming for skyline computation using FlowGraph and SYCL.
Future Gener. Comput. Syst., April, 2023

2022
Lightweight asynchronous scheduling in heterogeneous reconfigurable systems.
J. Syst. Archit., 2022

2021
Efficiency and productivity for decision making on low-power heterogeneous CPU+GPU SoCs.
J. Supercomput., 2021

Efficient heterogeneous matrix profile on a CPU + High Performance FPGA with integrated HBM.
Future Gener. Comput. Syst., 2021

2020
ScrimpCo: scalable matrix profile on commodity heterogeneous processors.
J. Supercomput., 2020

Parallel multiprocessing and scheduling on the heterogeneous Xeon+FPGA platform.
J. Supercomput., 2020

Characterization, Statistical Analysis and Method Selection in the Two-Clocks Synchronization Problem for Pairwise Interconnected Sensors.
Sensors, 2020

Performance evaluation of decision making under uncertainty for low power heterogeneous platforms.
J. Parallel Distributed Comput., 2020

High-Performance Simultaneous Multiprocessing for Heterogeneous System-on-Chip.
CoRR, 2020

2019
Toward a software transactional memory for heterogeneous CPU-GPU processors.
J. Supercomput., 2019

Correction to: Simultaneous multiprocessing in a software-defined heterogeneous FPGA.
J. Supercomput., 2019

Simultaneous multiprocessing in a software-defined heterogeneous FPGA.
J. Supercomput., 2019

Exploring heterogeneous scheduling for edge computing with CPU and FPGA MPSoCs.
J. Syst. Archit., 2019

Heterogeneous parallel_for Template for CPU-GPU Chips.
Int. J. Parallel Program., 2019

2018
Lightweight Hardware Transactional Memory for GPU Scratchpad Memory.
IEEE Trans. Computers, 2018

Exploiting social network graph characteristics for efficient BFS on heterogeneous chips.
J. Parallel Distributed Comput., 2018

Parallelizing Workload Execution in Embedded and High-Performance Heterogeneous Systems.
CoRR, 2018

Workload Partitioning Strategy for Improved Parallelism on FPGA-CPU Heterogeneous Chips.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

2017
Towards a Software Transactional Memory for Heterogeneous CPU-GPU Processors.
Proceedings of the Parallel Computing is Everywhere, 2017

Simultaneous Multiprocessing on a FPGA+CPU Heterogeneous System-On-Chip.
Proceedings of the Parallel Computing is Everywhere, 2017

Hardware Support for Scratchpad Memory Transactions on GPU Architectures.
Proceedings of the Euro-Par 2017: Parallel Processing - 23rd International Conference on Parallel and Distributed Computing, Santiago de Compostela, Spain, August 28, 2017

2016
Mapping Streaming Applications on Commodity Multi-CPU and GPU On-Chip Processors.
IEEE Trans. Parallel Distributed Syst., 2016

Breadth-First Search on Heterogeneous Platforms: A Case of Study on Social Networks.
Proceedings of the 28th International Symposium on Computer Architecture and High Performance Computing, 2016

2015
Proceedings of the Workshop on High Performance Energy Efficient Embedded Systems (HIP3ES) 2015.
CoRR, 2015

Reducing overheads of dynamic scheduling on heterogeneous chips.
CoRR, 2015

Parallel Pipeline on Heterogeneous Multi-processing Architectures.
Proceedings of the 2015 IEEE TrustCom/BigDataSE/ISPA, 2015

Pipeline Template for Streaming Applications on Heterogeneous Chips.
Proceedings of the Parallel Computing: On the Road to Exascale, 2015

Workload distribution and balancing in FPGAs and CPUs with OpenCL and TBB.
Proceedings of the Parallel Computing: On the Road to Exascale, 2015

Adaptive Partitioning for Irregular Applications on Heterogeneous CPU-GPU Chips.
Proceedings of the International Conference on Computational Science, 2015

2014
Strategies for maximizing utilization on multi-CPU and multi-GPU heterogeneous architectures.
J. Supercomput., 2014

A case study of different task implementations for multioutput stages in non-trivial parallel pipeline applications.
Parallel Comput., 2014

Adaptive partitioning strategies for loop parallelism in heterogeneous architectures.
Proceedings of the International Conference on High Performance Computing & Simulation, 2014

2012
A data dependence test based on the projection of paths over shape graphs.
J. Parallel Distributed Comput., 2012

Global Data Re-allocation via Communication Aggregation in Chapel.
Proceedings of the IEEE 24th International Symposium on Computer Architecture and High Performance Computing, 2012

2011
A First Implementation of Parallel IO in Chapel for Block Data Distribution.
Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011

A case study of the task-based parallel wavefront pattern.
Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011

High-level template for the task-based parallel wavefront pattern.
Proceedings of the 18th International Conference on High Performance Computing, 2011

2010
Evaluation of the Task Programming Model in the Parallelization of Wavefront Problems.
Proceedings of the 12th IEEE International Conference on High Performance Computing and Communications, 2010

2009
Analytical Model of Patching and Load Sharing in a Distributed VoD System.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2009

Conflict Analysis for heap-based Data Dependence Detection.
Proceedings of the Parallel Computing: From Multicores and GPU's to Petascale, 2009

Load balancing using work-stealing for pipeline parallelism in emerging applications.
Proceedings of the 23rd international conference on Supercomputing, 2009

On the Automatic Detection of Heap-Induced Data Dependencies with Interprocedural Shape Analysis.
Proceedings of the ICPPW 2009, 2009

Analytical Modeling of Pipeline Parallelism.
Proceedings of the PACT 2009, 2009

2008
Parallelizing irregular C codes assisted by interprocedural shape analysis.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

Complete Def-Use Analysis in Recursive Programs with Dynamic Data Structures.
Proceedings of the Euro-Par 2008 Workshops, 2008

2007
Detecting loop-carried dependences in programs with dynamic data structures.
J. Parallel Distributed Comput., 2007

2006
A Case Study of Load Sharing Based on Popularity in Distributed VoD Systems.
IEEE Trans. Multim., 2006

Towards a Versatile Pointer Analysis Framework.
Proceedings of the Euro-Par 2006, Parallel Processing, 12th International Euro-Par Conference, Dresden, Germany, August 28, 2006

2005
On the parallelization of irregular and dynamic programs.
Parallel Comput., 2005

A New Strategy for Shape Analysis Based on Coexistent Link Sets.
Proceedings of the Parallel Computing: Current & Future Issues of High-End Computing, 2005

A Novel Approach for Detecting Heap-Based Loop-Carried Dependences.
Proceedings of the 34th International Conference on Parallel Processing (ICPP 2005), 2005

2004
Optimization Techniques for Irregular and Pointer-Based Programs.
Proceedings of the 12th Euromicro Workshop on Parallel, 2004

Two Hybrid Multicast Algorithms for Optimizing Resources in a Distributed VoD System.
Proceedings of the 10th International Multimedia Modeling Conference (MMM 2004), 2004

A New Dependence Test Based on Shape Analysis for Pointer-Based Codes.
Proceedings of the Languages and Compilers for High Performance Computing, 2004

An Adaptable Time-Delay Neural Network to Predict the Spanish Economic Indebtedness.
Proceedings of the ICEIS 2004, 2004

2003
Compiler Techniques for the Distribution of Data and Computation.
IEEE Trans. Parallel Distributed Syst., 2003

2002
An Advanced Compiler Framework for Non-Cache-Coherent Multiprocessors.
IEEE Trans. Parallel Distributed Syst., 2002

Load sharing based on popularity in distributed video on demand systems.
Proceedings of the 2002 IEEE International Conference on Multimedia and Expo, 2002

1999
An Automatic Iteration/Data Distribution Method Based on Access Descriptors for DSMM.
Proceedings of the Languages and Compilers for Parallel Computing, 1999

Access Descriptor Based Locality Analysis for Distributed-Shared Memory Multiprocessors.
Proceedings of the International Conference on Parallel Processing 1999, 1999

1998
Parallelization of Benchmarks for Scalable Shared-Memory Multiprocessors.
Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques, 1998

1997
Compiler Techniques for Effective Communication on Distributed-Memory Multiprocessors.
Proceedings of the 1997 International Conference on Parallel Processing (ICPP '97), 1997


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