Ángel López García-Arias

According to our database, Ángel López García-Arias authored at least 12 papers between 2018 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Restricted Random Pruning at Initialization for High Compression Range.

Hikari Otsuka, Yasuyuki Okoshi, Ángel López García-Arias, Kazushi Kawamura, Thiem Van Chu, Daichi Fujiki, Masato Motomura

Trans. Mach. Learn. Res., 2024

Partial Search in a Frozen Network is Enough to Find a Strong Lottery Ticket.

Hikari Otsuka, Daiki Chijiwa, Ángel López García-Arias, Yasuyuki Okoshi, Kazushi Kawamura, Thiem Van Chu, Daichi Fujiki, Susumu Takeuchi, Masato Motomura

CoRR, 2024

Pianissimo: A Sub-mW Class DNN Accelerator With Progressively Adjustable Bit-Precision.

Junnosuke Suzuki, Jaehoon Yu, Mari Yasunaga, Ángel López García-Arias, Yasuyuki Okoshi, Shungo Kumazawa, Kota Ando, Kazushi Kawamura, Thiem Van Chu, Masato Motomura

IEEE Access, 2024

2023

Recurrent Residual Networks Contain Stronger Lottery Tickets.

Ángel López García-Arias, Yasuyuki Okoshi, Masanori Hashimoto, Masato Motomura, Jaehoon Yu

IEEE Access, 2023

Pianissimo: A Sub-mW Class DNN Accelerator with Progressive Bit-by-Bit Datapath Architecture for Adaptive Inference at Edge.

Junnosuke Suzuki, Jaehoon Yu, Mari Yasunaga, Ángel López García-Arias, Yasuyuki Okoshi, Shungo Kumazawa, Kota Ando, Kazushi Kawamura, Thiem Van Chu, Masato Motomura

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

Multicoated and Folded Graph Neural Networks With Strong Lottery Tickets.

Jiale Yan, Hiroaki Ito, Ángel López García-Arias, Yasuyuki Okoshi, Hikari Otsuka, Kazushi Kawamura, Thiem Van Chu, Masato Motomura

Proceedings of the Learning on Graphs Conference, 27-30 November 2023, Virtual Event., 2023

Amorphica: 4-Replica 512 Fully Connected Spin 336MHz Metamorphic Annealer with Programmable Optimization Strategy and Compressed-Spin-Transfer Multi-Chip Extension.

Kazushi Kawamura, Jaehoon Yu, Daiki Okonogi, Satoru Jimbo, Genta Inoue, Akira Hyodo, Ángel López García-Arias, Kota Ando, Bruno Hideki Fukushima-Kimura, Ryota Yasudo, Thiem Van Chu, Masato Motomura

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2022

Hiddenite: 4K-PE Hidden Network Inference 4D-Tensor Engine Exploiting On-Chip Model Construction Achieving 34.8-to-16.0TOPS/W for CIFAR-100 and ImageNet.

Kazutoshi Hirose, Jaehoon Yu, Kota Ando, Yasuyuki Okoshi, Ángel López García-Arias, Junnosuke Suzuki, Thiem Van Chu, Kazushi Kawamura, Masato Motomura

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

Multicoated Supermasks Enhance Hidden Networks.

Yasuyuki Okoshi, Ángel López García-Arias, Kazutoshi Hirose, Kota Ando, Kazushi Kawamura, Thiem Van Chu, Masato Motomura, Jaehoon Yu

Proceedings of the International Conference on Machine Learning, 2022

2021

Hidden-Fold Networks: Random Recurrent Residuals Using Sparse Supermasks.

Ángel López García-Arias, Masanori Hashimoto, Masato Motomura, Jaehoon Yu

Proceedings of the 32nd British Machine Vision Conference 2021, 2021

2020

Low-Cost Reservoir Computing using Cellular Automata and Random Forests.

Ángel López García-Arias, Jaehoon Yu, Masanori Hashimoto

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2018

Submicrosecond Latency Video Compression in a Low-End FPGA-based System-on-Chip.

Tobias Alonso, Mario Ruiz, Angel Lopez Garcia-Arias, Gustavo Sutter, Jorge E. López de Vergara

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018