Andrzej Peczalski

According to our database, Andrzej Peczalski authored at least 5 papers between 1986 and 1994.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

1994

Modeling frequency dependence of GaAs MESFET characteristics.

Jeff Conger, Andrzej Peczalski, Michael S. Shur

IEEE J. Solid State Circuits, January, 1994

1988

A 6 K GaAs gate array with fully functional LSI personalization.

Andrzej Peczalski, Gi Young Lee, William R. Betten, H. Somal, Mark Plagens, James R. Biard, Ian Burrows, Barry K. Gilbert, Rick L. Thompson, Barbara A. Naused, Susan M. Karwoski, Mark L. Samson, Sharon K. Zahn

IEEE J. Solid State Circuits, April, 1988

The performance of source-coupled FET logic circuits that use GaAs MESFETs.

Tho Truong Vu, Andrzej Peczalski, Kang W. Lee, Jeff Conger

IEEE J. Solid State Circuits, February, 1988

Low-power 2K-cell SDFL gate array and DCFL circuits using GaAs self-aligned E/D MESFETs.

Tho Truong Vu, Roderick D. Nelson, Gary M. Lee, Peter C. T. Roberts, Kang W. Lee, Stephen K. Swanson, Andrzej Peczalski, William R. Betten, Steven A. Hanka, Max J. Helix, Peter J. Vold, Gi Young Lee, Stephen A. Jamison, Christopher A. Arsenault, Susan M. Karwoski, Barbara A. Naused, Barry K. Gilbert, Michael S. Shur

IEEE J. Solid State Circuits, February, 1988

1986

Design Analysis of GaAs Direct Coupled Field Effect Transistor Logic.

Andrzej Peczalski, Michael S. Shur, Choong H. Hyun, Kang W. Lee, Tho Truong Vu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1986