Andriy Hikavyy

According to our database1, Andriy Hikavyy authored at least 8 papers between 2016 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
Nanosheet-based Complementary Field-Effect Transistors (CFETs) at 48nm Gate Pitch, and Middle Dielectric Isolation to enable CFET Inner Spacer Formation and Multi-Vt Patterning.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

Comprehensive 300 mm process for Silicon spin qubits with modular integration.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2022

Demonstration of 3D sequential FD-SOI on CMOS FinFET stacking featuring low temperature Si layer transfer and top tier device fabrication with tier interconnections.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Innovations in Transistor Architecture and Device Connectivity for Advanced Logic Scaling.
Proceedings of the International Conference on IC Design and Technology, 2022

2018
Scalability comparison between raised- and embedded-SiGe source/drain structures for Si<sub>0.55</sub>Ge<sub>0.45</sub> implant free quantum well pFET.
Microelectron. Reliab., 2018

Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling.
Proceedings of the 2018 International Conference on IC Design & Technology, 2018

2016


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