Andrew Suchanek

According to our database, Andrew Suchanek authored at least 2 papers between 2017 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2023

A 0.2-2 GHz Time-Interleaved Multistage Switched-Capacitor Delay Element Achieving 2.55-448.6 ns Programmable Delay Range and 330 ns/mm² Area Efficiency.

Travis Forbes, Benjamin Magstadt, Jesse Moody, Justine Saugen, Andrew Suchanek, Spencer Nelson

IEEE J. Solid State Circuits, 2023

2017

Recent Advances in Low Power Asynchronous Circuit Design.

Jia Di, Brent A. Bell, William Bouillon, John Brady, Thao Le, Chien-Wei Lo, Liang Men, Spencer Nelson, Francis Sabado, Andrew Suchanek

J. Low Power Electron., 2017