Andrew Lines

According to our database, Andrew Lines authored at least 15 papers between 1994 and 2021.

Collaborative distances:

• Dijkstra number of two.
• Erdős number of four.

2021

Asynchronous Serial Infrastructure Using FPIO.

Andrew Lines

Proceedings of the 27th IEEE International Symposium on Asynchronous Circuits and Systems, 2021

2018

Loihi: A Neuromorphic Manycore Processor with On-Chip Learning.

Mike Davies, Narayan Srinivasa, Tsung-Han Lin, Gautham N. Chinya, Yongqiang Cao, Sri Harsha Choday, Georgios D. Dimou, Prasad Joshi, Nabil Imam, Shweta Jain, Yuyun Liao, Chit-Kwan Lin, Andrew Lines, Ruokun Liu, Deepak Mathaikutty, Steven McCoy, Arnab Paul, Jonathan Tse, Guruguhanathan Venkataramanan, Yi-Hsin Weng, Andreas Wild, Yoonseok Yang, Hong Wang

IEEE Micro, 2018

A Single-Stage, Single-Inductor, 6-Input 9-Output Multi-Modal Energy Harvesting Power Management IC for 100µW-120MW Battery-Powered IoT Edge Nodes.

Suhwan Kim, Vaibhav A. Vaidya, Christopher Schaef, Andrew Lines, Harish Krishnamurthy, Sheldon Weng, Xiaosen Liu, Dileep Kurian, Tanay Karnik, Krishnan Ravichandran, James W. Tschanz, Vivek De

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

Loihi Asynchronous Neuromorphic Research Chip.

Andrew Lines, Prasad Joshi, Ruokun Liu, Steve McCoy, Jonathan Tse, Yi-Hsin Weng, Mike Davies

Proceedings of the 24th IEEE International Symposium on Asynchronous Circuits and Systems, 2018

2014

Performance-Driven Clustering of Asynchronous Circuits.

Georgios D. Dimou, Peter A. Beerel, Andrew Lines

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

A 72-Port 10G Ethernet Switch/Router Using Quasi-Delay-Insensitive Asynchronous Design.

Mike Davies, Andrew Lines, Jon Dama, Alain Gravel, Robert Southworth, Georgios D. Dimou, Peter A. Beerel

Proceedings of the 20th IEEE International Symposium on Asynchronous Circuits and Systems, 2014

2013

NanoMesh: An Asynchronous Kilo-Core System-on-Chip.

Jonathan Tse, Andrew Lines

Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems, 2013

2011

Proteus: An ASIC Flow for GHz Asynchronous Designs.

Peter A. Beerel, Georgios D. Dimou, Andrew Lines

IEEE Des. Test Comput., 2011

2009

GHz Asynchronous SRAM in 65nm.

Jonathan Dama, Andrew Lines

Proceedings of the 15th IEEE Symposium on Asynchronous Circuits and Systems, 2009

2007

The Vortex: A Superscalar Asynchronous Processor.

Andrew Lines

Proceedings of the 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2007), 2007

2006

Slack Matching Asynchronous Designs.

Peter A. Beerel, Nam-Hoon Kim, Andrew Lines, Mike Davies

Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2006), 2006

2004

Asynchronous Interconnect for Synchronous SoC Design.

Andrew Lines

IEEE Micro, 2004

2003

Nexus: an asynchronous crossbar interconnect for synchronous system-on-chip designs.

Andrew Lines

Proceedings of the 11th Annual IEEE Symposium on High Performance Interconnects, 2003

1997

The Design of an Asynchronous MIPS R3000 Microprocessor.

Alain J. Martin, Andrew Lines, Rajit Manohar, Mika Nyström, Paul I. Pénzes, Robert Southworth, Uri Cummings

Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97), 1997

1994

An asynchronous pipelined lattice structure filter.

Uri Cummings, Andrew Lines, Alain J. Martin

Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems, 1994