Andrew D. Brown
Orcid: 0000-0002-5389-308XAffiliations:
- University of Southampton, UK
According to our database1,
Andrew D. Brown
authored at least 63 papers
between 1987 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
IEEE ACM Trans. Comput. Biol. Bioinform., 2024
2023
Advancements in spiking neural network communication and synchronization techniques for event-driven neuromorphic systems.
Array, December, 2023
POETS: An Event-driven Approach to Dissipative Particle Dynamics: Implementing a Massively Compute-intensive Problem on a Novel Hard/Software Architecture.
ACM Trans. Parallel Comput., June, 2023
Event-based high throughput computing: A series of case studies on a massively parallel softcore machine.
IET Comput. Digit. Tech., January, 2023
2022
Asynchronous simulated annealing on the placement problem: A beneficial race condition.
J. Parallel Distributed Comput., 2022
Synchronization in graph analysis algorithms on the Partially Ordered Event-Triggered Systems many-core architecture.
IET Comput. Digit. Tech., 2022
2021
Proceedings of the 29th Euromicro International Conference on Parallel, 2021
Neuromorphic Design Using Reward-based STDP Learning on Event-Based Reconfigurable Cluster Architecture.
Proceedings of the ICONS 2021: International Conference on Neuromorphic Systems 2021, 2021
2020
Proceedings of the 2020 International Joint Conference on Neural Networks, 2020
Proceedings of the 31st IEEE International Conference on Application-specific Systems, 2020
2019
Proceedings of the Parallel Computing: Technology Trends, 2019
2018
IEEE Trans. Multi Scale Comput. Syst., 2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Using machine learning for sequence-level automated MRI protocol selection in neuroradiology.
J. Am. Medical Informatics Assoc., 2018
2017
Proceedings of the Parallel Computing is Everywhere, 2017
Proceedings of the 46th International Conference on Parallel Processing Workshops, 2017
Proceedings of the 2017 Forum on Specification and Design Languages, 2017
2016
Proceedings of the 11th European Workshop on Microelectronics Education, 2016
2015
2013
IEEE Trans. Mob. Comput., 2013
SpiNNaker: A 1-W 18-Core System-on-Chip for Massively-Parallel Neural Network Simulation.
IEEE J. Solid State Circuits, 2013
IET Comput. Digit. Tech., 2013
Proceedings of the Parallel Computing: Accelerating Computational Science and Engineering (CSE), 2013
2012
IET Comput. Digit. Tech., 2012
2011
Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011
2010
Proceedings of the 7th Conference on Computing Frontiers, 2010
2009
Biologically-Inspired Massively-Parallel Architectures - Computing Beyond a Million Processors.
Proceedings of the Ninth International Conference on Application of Concurrency to System Design, 2009
2008
Proceedings of the Advances in Neuro-Information Processing, 15th International Conference, 2008
Yield model characterization for analog integrated circuit using Pareto-optimal surface.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
A New Approach for Combining Yield and Performance in Behavioural Models for Analogue Integrated Circuits.
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the 2008 IEEE International Behavioral Modeling and Simulation Workshop, 2008
2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2005
Proceedings of the 12th IEEE International Conference on Electronics, 2005
2004
IEEE Trans. Very Large Scale Integr. Syst., 2004
Behavioural modelling of analogue faults in VHDL-AMS - a case study.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Multiple domain behavioral modeling using VHDL-AMS.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the Biometric Authentication, First International Conference, 2004
Efficient Mixed-Domain Behavioural Modeling of Ferromagnetic Hysteresis Implemented in VHDL-AMS.
Proceedings of the 2004 Design, 2004
Proceedings of the 10th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2004), 2004
2003
The continuous-discrete interface - What does this really mean? Modelling and simulation issues.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
2002
A large-scale simulation of the piriform cortex by a cell automaton-based network model.
IEEE Trans. Biomed. Eng., 2002
Proceedings of the 2002 Design, 2002
2001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001
Proceedings of the Advances in Neural Information Processing Systems 14 [Neural Information Processing Systems: Natural and Synthetic, 2001
Proceedings of the Eighth International Workshop on Artificial Intelligence and Statistics, 2001
2000
IEEE Trans. Ind. Electron., 2000
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000
1999
IEEE Trans. Ind. Electron., 1999
Cooperative-Competitive Algorithms for Evolutionary Networks Classifying Noisy Digital Images.
Neural Process. Lett., 1999
Proceedings of the Advances in Neural Information Processing Systems 12, [NIPS Conference, Denver, Colorado, USA, November 29, 1999
1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
Proceedings of International Conference on Neural Networks (ICNN'97), 1997
1992
1991
A General Purpose Network Solving System.
Proceedings of the VLSI 91, 1991
1990
1987
The Reconstruction of Neurone Morphology from Thin Optical Sections - Graphical Aspects.
Proceedings of the 8th European Computer Graphics Conference and Exhibition, 1987