Andrew Bardsley

According to our database1, Andrew Bardsley authored at least 11 papers between 2000 and 2010.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2010
Description-Level Optimisation of Synthesisable Asynchronous Circuits.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

2009
Teak: A Token-Flow Implementation for the Balsa Language.
Proceedings of the Ninth International Conference on Application of Concurrency to System Design, 2009

2007
Performance-driven syntax-directed synthesis of asynchronous processors.
Proceedings of the 2007 International Conference on Compilers, 2007

Asynchronous on-Chip Communication: Explorations on the Intel PXA27x Processor Peripheral Bus.
Proceedings of the 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2007), 2007

2006
Synthesising Heterogeneously Encoded Systems.
Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2006), 2006

2003
SPA - a secure Amulet core for smartcard applications.
Microprocess. Microsystems, 2003

2002
Balsa: An Asynchronous Hardware Synthesis Language.
Comput. J., 2002

A Burst-Mode Oriented Back-End for the Balsa Synthesis System.
Proceedings of the 2002 Design, 2002

SPA - A Synthesisable Amulet Core for Smartcard pplications.
Proceedings of the 8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002), 2002

2000
Synthesising an asynchronous DMA controller with Balsa.
J. Syst. Archit., 2000

AMULET3i - An Asynchronous System-on-Chip.
Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2000


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