Andrew A. Kennings

According to our database, Andrew A. Kennings authored at least 52 papers between 1999 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

Eh?Predictor: A Deep Learning Framework to Identify Detailed Routing Short Violations From a Placed Netlist.

Aysa Fakheri Tabrizi, Nima Karimpour Darav, Logan Rakai, Ismail Bustany, Andrew A. Kennings, Laleh Behjat

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2019

Multi-Commodity Flow-Based Spreading in a Commercial Analytic Placer.

Nima Karimpour Darav, Andrew A. Kennings, Kristofer Vorwerk, Arun Kundu

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

2018

Eh?Legalizer: A High Performance Standard-Cell Legalizer Observing Technology Constraints.

Nima Karimpour Darav, Ismail S. Bustany, Andrew A. Kennings, David T. Westwick, Laleh Behjat

ACM Trans. Design Autom. Electr. Syst., 2018

Simple FPGA routing graph compression.

Andrew A. Kennings

CoRR, 2018

A machine learning framework to identify detailed routing short violations from a placed netlist.

Aysa Fakheri Tabrizi, Nima Karimpour Darav, Shuchang Xu, Logan Rakai, Ismail Bustany, Andrew A. Kennings, Laleh Behjat

Proceedings of the 55th Annual Design Automation Conference, 2018

2017

Detailed routing violation prediction during placement using machine learning.

Aysa Fakheri Tabrizi, Nima Karimpour Darav, Logan Rakai, Andrew A. Kennings, Laleh Behjat

Proceedings of the 2017 International Symposium on VLSI Design, Automation and Test, 2017

A Fast, Robust Network Flow-based Standard-Cell Legalization Method for Minimizing Maximum Movement.

Nima Karimpour Darav, Ismail S. Bustany, Andrew A. Kennings, Laleh Behjat

Proceedings of the 2017 ACM on International Symposium on Physical Design, 2017

ICCAD-2017 CAD contest in multi-deck standard cell legalization and benchmarks.

Nima Karimpour Darav, Ismail S. Bustany, Andrew A. Kennings, Ravi Mamidi

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

2016

Circuit Placement.

Andrew A. Kennings, Igor L. Markov

Encyclopedia of Algorithms, 2016

Eh?Placer: A High-Performance Modern Technology-Driven Placer.

Nima Karimpour Darav, Andrew A. Kennings, Aysa Fakheri Tabrizi, David T. Westwick, Laleh Behjat

ACM Trans. Design Autom. Electr. Syst., 2016

Routing-Aware Incremental Timing-Driven Placement.

Jucemar Monteiro, Nima Karimpour Darav, Guilherme Flach, Mateus Fogaça, Ricardo Augusto da Luz Reis, Andrew A. Kennings, Marcelo O. Johann, Laleh Behjat

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

2015

Runtime slack-deficit detection for a low-voltage DCT circuit.

Yaoqiang Li, Pierce I-Jen Chuang, Andrew A. Kennings, Manoj Sachdev

Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

The impact of industry-organized contests on EDA education.

Nima Karimpour Darav, Amin Farshidi, Aysa Fakheri Tabrizi, Emily Marasco, Amir Karbalaei, Andrew A. Kennings, Ismail S. Bustany, Laleh Behjat

Proceedings of the 2015 IEEE International Conference on Microelectronics Systems Education, 2015

A Detailed Routing-Aware Detailed Placement Technique.

Aysa Fakheri Tabrizi, Nima Karimpour Darav, Logan M. Rakai, Andrew A. Kennings, William Swartz, Laleh Behjat

Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

High Performance Global Placement and Legalization Accounting for Fence Regions.

Nima Karimpour Darav, Andrew A. Kennings, David T. Westwick, Laleh Behjat

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Voltage-Boosted Synchronizers.

Yaoqiang Li, Pierce I-Jen Chuang, Andrew A. Kennings, Manoj Sachdev

Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

An FPGA Implementation of a Timing-Error Tolerant Discrete Cosine Transform (Abstract Only).

Yaoqiang Li, Pierce I-Jen Chuang, Andrew A. Kennings, Manoj Sachdev

Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

2014

Detailed placement accounting for technology constraints.

Andrew A. Kennings, Nima Karimpour Darav, Laleh Behjat

Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014

2012

FPGA Power Reduction by Guarded Evaluation Considering Logic Architecture.

Chirag Ravishankar, Jason Helge Anderson, Andrew A. Kennings

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

FPGA power reduction by guarded evaluation considering physical information.

Chirag Ravishankar, Andrew A. Kennings, Jason Helge Anderson

Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012

Analysis and evaluation of greedy thread swapping based dynamic power management for MPSoC platforms.

Chirag Ravishankar, Sundaram Ananthanarayanan, Siddharth Garg, Andrew A. Kennings

Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

EmPower: FPGA based rapid prototyping of dynamic power management algorithms for multi-processor systems on chip.

Chirag Ravishankar, Sundaram Ananthanarayanan, Siddharth Garg, Andrew A. Kennings

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

EmPower: FPGA based emulation of dynamic power management algorithms for multi-core systems on chip (abstract only).

Sundaram Ananthanarayanan, Chirag Ravishankar, Siddharth Garg, Andrew A. Kennings

Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

2011

FPGA technology mapping with encoded libraries and staged priority cuts.

Andrew A. Kennings, Kristofer Vorwerk, Arun Kundu, Val Pevzner, Andy Fox

ACM Trans. Reconfigurable Technol. Syst., 2011

Parallel FPGA technology mapping using multi-core architectures.

Andrew A. Kennings, Chirag Ravishankar

Proceedings of the 24th Canadian Conference on Electrical and Computer Engineering, 2011

2010

Power minimisation during field programmable gate array placement.

Kristofer Vorwerk, Andrew A. Kennings, Val Pevzner, Arun Kundu, Madhu Raman, Julien Dunoyer, Yaun-shung Hsu

IET Comput. Digit. Tech., 2010

Efficient FPGA Resynthesis Using Precomputed LUT Structures.

Andrew A. Kennings, Alan Mishchenko, Kristofer Vorwerk, Val Pevzner, Arun Kundu

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009

Improving Simulated Annealing-Based FPGA Placement With Directed Moves.

Kristofer Vorwerk, Andrew A. Kennings, Jonathan W. Greene

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Physical optimization for FPGAs using post-placement topology rewriting.

Val Pevzner, Andrew A. Kennings, Andy Fox

Proceedings of the 2009 International Symposium on Physical Design, 2009

FPGA technology mapping with encoded libraries andstaged priority cuts.

Andrew A. Kennings, Kristofer Vorwerk, Arun Kundu, Val Pevzner, Andy Fox

Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

2008

Force-Directed and Other Continuous Placement Methods.

Andrew A. Kennings, Kristofer Vorwerk

Proceedings of the Handbook of Algorithms for Physical Design Automation., 2008

Circuit Placement.

Andrew A. Kennings, Igor L. Markov

Proceedings of the Encyclopedia of Algorithms - 2008 Edition, 2008

A technique for minimizing power during FPGA placement.

Kristofer Vorwerk, Madhu Raman, Julien Dunoyer, Yaun-Chung Hsu, Arun Kundu, Andrew A. Kennings

Proceedings of the FPL 2008, 2008

2007

Net Cluster: A Net-Reduction-Based Clustering Preprocessing Algorithm for Partitioning and Placement.

Jianhua Li, Laleh Behjat, Andrew A. Kennings

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Floorplan repair using dynamic whitespace management.

Kristofer Vorwerk, Andrew A. Kennings, Doris T. Chen, Laleh Behjat

Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

Adaptive multiple texture approach to texture packing for 3D video games.

Alexander Wong, Andrew A. Kennings

Proceedings of the 2007 conference on Future Play, Toronto, ON, Canada, November 15, 2007

Improving Annealing Via Directed Moves.

Kristofer Vorwerk, Andrew A. Kennings, Jonathan W. Greene, Doris T. Chen

Proceedings of the FPL 2007, 2007

Improving Timing-Driven FPGA Packing With Physical Information.

Doris T. Chen, Kristofer Vorwerk, Andrew A. Kennings

Proceedings of the FPL 2007, 2007

2006

Force-Directed Methods for Generic Placement.

Andrew A. Kennings, Kristofer Vorwerk

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

2005

A semidefinite optimization approach for the single-row layout problem with unequal dimensions.

Miguel F. Anjos, Andrew A. Kennings, Anthony Vannelli

Discret. Optim., 2005

Mixed-size placement via line search.

Kristofer Vorwerk, Andrew A. Kennings

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

An Improved Multi-Level Framework for Force-Directed Placement.

Kristofer Vorwerk, Andrew A. Kennings

Proceedings of the 2005 Design, 2005

Symmetric Multiprocessing on Programmable Chips Made Easy.

Austin Hung, William D. Bishop, Andrew A. Kennings

Proceedings of the 2005 Design, 2005

2004

Segmented channel routability via satisfiability.

William N. N. Hung, Xiaoyu Song, El Mostapha Aboulhamid, Andrew A. Kennings, Alan J. Coppola

ACM Trans. Design Autom. Electr. Syst., 2004

Engineering details of a stable force-directed placer.

Kristofer Vorwerk, Andrew A. Kennings, Anthony Vannelli

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

Enabling Cache Coherency for N-Way SMP Systems on Programmable Chips.

Austin Hung, William D. Bishop, Andrew A. Kennings

Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004

2003

Board-level multiterminal net assignment for the partial cross-bar architecture.

Xiaoyu Song, William N. N. Hung, Alan Mishchenko, Malgorzata Chrzanowska-Jeske, Andrew A. Kennings, Alan J. Coppola

IEEE Trans. Very Large Scale Integr. Syst., 2003

2002

On segmented channel routability.

William N. N. Hung, Xiaoyu Song, Alan J. Coppola, Andrew A. Kennings

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Board-level multiterminal net assignment.

Xiaoyu Song, William N. N. Hung, Alan Mishchenko, Malgorzata Chrzanowska-Jeske, Alan J. Coppola, Andrew A. Kennings

Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002, 2002

2000

Analytical minimization of half-perimeter wirelength.

Andrew A. Kennings, Igor L. Markov

Proceedings of ASP-DAC 2000, 2000

1999

Hypergraph Partitioning for VLSI CAD: Methodology for Heuristic Development, Experimentation and Reporting.

Andrew E. Caldwell, Andrew B. Kahng, Andrew A. Kennings, Igor L. Markov

Proceedings of the 36th Conference on Design Automation, 1999

Function Smoothing with Applications to VLSI Layout.

Ross Baldick, Andrew B. Kahng, Andrew A. Kennings, Igor L. Markov

Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999