Andres J. Torres

According to our database, Andres J. Torres authored at least 15 papers between 2011 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Knowledge Transfer. From Electronic Design Automation to Advanced Process Manufacturing.

J. Andres Torres, Melody Tao, Anastasiia Doinychko, Mohan Govindaraj, Srividya Jayaram, Nathan Greeneltch

Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

Challenges and Opportunities in Heterogenous Integration During Design and Process Co-Optimization.

J. Andres Torres

Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

2020

The k-path coloring problem in graphs of bounded treewidth: An application in integrated circuit manufacturing.

Dehia Ait-Ferhat, Vincent Juliard, Gautier Stauffer, J. Andres Torres

Oper. Res. Lett., 2020

Combining lithography and Directed Self Assembly for the manufacturing of vias: Connections to graph coloring problems, integer programming formulations, and numerical experiments.

Dehia Ait-Ferhat, Vincent Juliard, Gautier Stauffer, J. Andres Torres

Eur. J. Oper. Res., 2020

2019

DSA-aware multiple patterning for the manufacturing of vias: Connections to graph coloring problems, IP formulations, and numerical experiments.

Dehia Ait-Ferhat, Vincent Juliard, Gautier Stauffer, J. Andres Torres

CoRR, 2019

2017

Overview and development of EDA tools for integration of DSA into patterning solutions.

J. Andres Torres, Germain Fenger, Daman Khaira, Yuansheng Ma, Yuri Granik, Chris Kapral, Joydeep Mitra, Polina Krasnova, Dehia Ait-Ferhat

Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

2016

Advanced multi-patterning and hybrid lithography techniques.

Fedor G. Pikus, Andres J. Torres

Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2014

Litho-Friendly Decomposition Method for Self-Aligned Triple Patterning.

Minoo Mirsaeedi, Andres J. Torres, Mohab H. Anis

IEEE Trans. Very Large Scale Integr. Syst., 2014

2013

Litho-Friendly Decomposition Method for Self-Aligned Double Patterning.

Minoo Mirsaeedi, Andres J. Torres, Mohab H. Anis

IEEE Trans. Very Large Scale Integr. Syst., 2013

A Designer's Guide to Subresolution Lithography: Enabling the Impossible to Get to the 14-nm Node [Tutorial].

Lars Liebmann, J. Andres Torres

IEEE Des. Test, 2013

2012

ICCAD-2012 CAD contest in fuzzy pattern matching for physical verification and benchmark suite.

J. Andres Torres

Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

2011

High Performance Lithography Hotspot Detection With Successively Refined Pattern Identifications and Machine Learning.

Duo Ding, J. Andres Torres, David Z. Pan

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Self-aligned double patterning (SADP) layout decomposition.

Minoo Mirsaeedi, J. Andres Torres, Mohab H. Anis

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

Rapid layout pattern classification.

Jen-Yi Wuu, Fedor G. Pikus, Andres J. Torres, Malgorzata Marek-Sadowska

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

High performance lithographic hotspot detection using hierarchically refined machine learning.

Duo Ding, Andres J. Torres, Fedor G. Pikus, David Z. Pan

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011