Andreas Wortmann

Affiliations:

City University of Applied Sciences, Bremen, Germany

According to our database¹, Andreas Wortmann authored at least 7 papers between 2002 and 2006.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

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Bibliography

2006

Low power synthesizable register files for processor and IP cores.

[BibT_eX]

[DOI]

Integr., 2006

2004

[BibT_eX]

[DOI]

Proceedings of the Integrated Circuit and System Design, 2004

An instruction set for the efficient implementation of the CORDIC algorithm.

[BibT_eX]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

The impact of clock gating schemes on the power dissipation of synthesizable register files.

[BibT_eX]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A High-Speed Transceiver Architecture Implementable as Synthesizable IP Core.

[BibT_eX]

[DOI]

Andreas Wortmann

Sven Simon

Matthias Müller

Proceedings of the 2004 Design, 2004

2003

A power efficient register file architecture using master latch sharing.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002

Low power register file architecture for application specific DSPs.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Andreas Wortmann

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