Andreas Kurth
Orcid: 0000-0001-5613-9544
According to our database1,
Andreas Kurth
authored at least 21 papers
between 2016 and 2024.
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Online presence:
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Bibliography
2024
IEEE Trans. Computers, January, 2024
2023
PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
IEEE Trans. Parallel Distributed Syst., 2022
IEEE Trans. Computers, 2022
2021
CoRR, 2021
A RISC-V in-network accelerator for flexible high-performance low-power packet processing.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
Analyzing Memory Interference of FPGA Accelerators on Multicore Hosts in Heterogeneous Reconfigurable SoCs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
CoRR, 2020
Proceedings of the 41st ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2020
A Synergistic Approach to Predictable Compilation and Scheduling on Commodity Multi-Cores.
Proceedings of the 21st ACM SIGPLAN/SIGBED International Conference on Languages, 2020
ATUNs: Modular and Scalable Support for Atomic Operations in a Shared Memory Multiprocessor.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
Design of an open-source bridge between non-coherent burst-based and coherent cache-line-based memory systems.
Proceedings of the 17th ACM International Conference on Computing Frontiers, 2020
Proceedings of the CC '20: 29th International Conference on Compiler Construction, 2020
2019
Proceedings of the International Conference for High Performance Computing, 2019
2018
Scalable and Efficient Virtual Memory Sharing in Heterogeneous SoCs with TLB Prefetching and MMU-Aware DMA Engine.
Proceedings of the 36th IEEE International Conference on Computer Design, 2018
HERO: an open-source research platform for HW/SW exploration of heterogeneous manycore systems.
Proceedings of the 2nd Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systems, 2018
2017
Efficient Virtual Memory Sharing via On-Accelerator Page Table Walking in Heterogeneous Embedded SoCs.
ACM Trans. Embed. Comput. Syst., 2017
HERO: Heterogeneous Embedded Research Platform for Exploring RISC-V Manycore Accelerators on FPGA.
CoRR, 2017
2016
Proceedings of the 14th ACM/IEEE Symposium on Embedded Systems for Real-Time Multimedia, 2016