Andreas Krall

Affiliations:
  • TU Wien, Vienna, Austria


According to our database1, Andreas Krall authored at least 78 papers between 1985 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
The Vienna Architecture Description Language.
CoRR, 2024

2023
A pred-LL(*) Parsable Typed Higher-Order Macro System for Architecture Description Languages.
Proceedings of the 22nd ACM SIGPLAN International Conference on Generative Programming: Concepts and Experiences, 2023

2022
Instruction Code Selection.
Proceedings of the SSA-based Compiler Design, 2022

2018
Fast and flexible instruction selection with constraints.
Proceedings of the 27th International Conference on Compiler Construction, 2018

2016
ATPS 2016: 9. Arbeitstagung Programmiersprachen.
Proceedings of the Software Engineering 2016, 2016

Vorwort zur 9. Arbeitstagung Programmiersprachen (ATPS 2016).
Proceedings of the Gemeinsamer Tagungsband der Workshops der Tagung Software Engineering 2016 (SE 2016), 2016

Vectorization in PyPy's Tracing Just-In-Time Compiler.
Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems, 2016

2015
vanHelsing: A Fast Proof Checker for Debuggable Compiler Verification.
Proceedings of the 17th International Symposium on Symbolic and Numeric Algorithms for Scientific Computing, 2015

2014
Computation of alias sets from shape graphs for comparison of shape analysis precision.
IET Softw., 2014

CASM: optimized compilation of abstract state machines.
Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2014

Integrated modulo scheduling and cluster assignment for TI TMS320C64x+ architecture.
Proceedings of the 11th Workshop on Optimizations for DSP and Embedded Systems, 2014

2013
DSP Instruction Set Simulation.
Proceedings of the Handbook of Signal Processing Systems, 2013

Automatic generation of compiler backends.
Softw. Pract. Exp., 2013

Foreword.
Sci. Comput. Program., 2013

CASM: Implementing an Abstract State Machine based Programming Language.
Proceedings of the Software Engineering 2013 - Workshopband (inkl. Doktorandensymposium), Fachtagung des GI-Fachbereichs Softwaretechnik, 26. Februar, 2013

Using the CASM language for simulator synthesis and model verification.
Proceedings of the 2013 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2013

Optimal and Heuristic Global Code Motion for Minimal Spilling.
Proceedings of the Compiler Construction - 22nd International Conference, 2013

2012
Special Issue: Compilers for Parallel Computing (CPC 2010).
Concurr. Comput. Pract. Exp., 2012

Using Semantic Relatedness and Locality for Requirements Elicitation Guidance.
Proceedings of the 24th International Conference on Software Engineering & Knowledge Engineering (SEKE'2012), 2012

A Unified Processor Model for Compiler Verification and Simulation Using ASM.
Proceedings of the Abstract State Machines, Alloy, B, VDM, and Z, 2012

2011
Modeling application-specific processors for embedded systems.
Proceedings of the 41. Jahrestagung der Gesellschaft für Informatik, 2011

Ontology-Driven Guidance for Requirements Elicitation.
Proceedings of the Semanic Web: Research and Applications, 2011

DODT: Increasing requirements formalism using domain ontologies for improved embedded systems development.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

2010
DSP Instruction Set Simulation.
Proceedings of the Handbook of Signal Processing Systems, 2010

2009
Stack allocation of objects in the CACAO virtual machine.
Proceedings of the 7th International Conference on Principles and Practice of Programming in Java, 2009

Progressive spill code placement.
Proceedings of the 2009 International Conference on Compilers, 2009

2008
Generalized instruction selection using <i>SSA</i>-graphs.
Proceedings of the 2008 ACM SIGPLAN/SIGBED Conference on Languages, 2008

08441 Final Report - Emerging Uses and Paradigms for Dynamic Binary Translation.
Proceedings of the Emerging Uses and Paradigms for Dynamic Binary Translation, 26.10., 2008

2007
Compiler optimizations for processors with SIMD instructions.
Softw. Pract. Exp., 2007

Ultra fast cycle-accurate compiled emulation of inorder pipelined architectures.
J. Syst. Archit., 2007

Instruction Set Encoding Optimization for Code Size Reduction.
Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, 2007

Adaptive inlining and on-stack replacement in the CACAO virtual machine.
Proceedings of the 5th International Symposium on Principles and Practice of Programming in Java, 2007

Leveraging Predicated Execution for Multimedia Processing.
Proceedings of the 2007 5th Workshop on Embedded Systems for Real-Time Multimedia, 2007

Compiler generation from structural architecture descriptions.
Proceedings of the 2007 International Conference on Compilers, 2007

Optimizations for Object-Oriented Languages.
Proceedings of the Compiler Design Handbook: Optimizations and Machine Code Generation, 2007

2006
Effective compiler generation by architecture description.
Proceedings of the 2006 ACM SIGPLAN/SIGBED Conference on Languages, 2006

2005
Control Flow Graph Reconstruction for Assembly Language Programs with Delayed Instructions.
Proceedings of the 5th IEEE International Workshop on Source Code Analysis and Manipulation (SCAM 2005), 30 September, 2005

2004
xDSPcore: A Compiler-Based Configurable Digital Signal Processor.
IEEE Micro, 2004

FSEL - Selective Predicated Execution for a Configurable DSP Core.
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

A scalable embedded DSP core for SoC applications.
Proceedings of the 2004 International Symposium on System-on-Chip, 2004

2003
Graph Coloring vs. Optimal Register Allocation for Optimizing Compilers.
Proceedings of the Modular Programming Languages, Joint Modular Languages Conference, 2003

VLIW operation refinement for reducing energy consumption.
Proceedings of the 2003 International Symposium on System-on-Chip, 2003

2002
Vmgen - a generator of efficient virtual machine interpreters.
Softw. Pract. Exp., 2002

Supporting Design by Contract in Java.
J. Object Technol., 2002

Register Liveness Analysis for Optimizing Dynamic Binary Translation.
Proceedings of the 9th Working Conference on Reverse Engineering (WCRE 2002), 28 October, 2002

Optimizations for Object-Oriented Languages.
Proceedings of the Compiler Design Handbook: Optimizations and Machine Code Generation, 2002

2001
Java for Large-Scale Scientific Computations?
Proceedings of the Large-Scale Scientific Computing, Third International Conference, 2001

Implementing an Efficient Java Interpreter.
Proceedings of the High-Performance Computing and Networking, 9th International Conference, 2001

2000
Compilation Techniques for Multimedia Processors.
Int. J. Parallel Program., 2000

1999
Minimizing Cost of Local Variables Access for DSP-Processors.
Proceedings of the ACM SIGPLAN 1999 Workshop on Languages, 1999

Garbage Collection for Large Memory JAVA Applications.
Proceedings of the High-Performance Computing and Networking, 7th International Conference, 1999

1998
Monitors and Exceptions: How to Implement Java Efficiently.
Concurr. Pract. Exp., 1998

Efficient JavaVM Just-in-Time Compilation.
Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques, 1998

1997
CACAO - A 64-bit JavaVM Just-in-Time Compiler.
Concurr. Pract. Exp., 1997

Efficient Type Inclusion Tests.
Proceedings of the 1997 ACM SIGPLAN Conference on Object-Oriented Programming Systems, 1997

On Extending Java.
Proceedings of the Modular Programming Languages, Joint Modular Languages Conference, 1997

Near Optimal Hierarchical Encoding of Types.
Proceedings of the ECOOP'97, 1997

1996
The Vienna Abstract Machine.
J. Log. Program., 1996

Removing Anti Dependences by Repairing.
Proceedings of the Compiler Construction, 6th International Conference, 1996

1995
Trace software pipelining.
J. Comput. Sci. Technol., 1995

Incremental Global Compilation of Prolog with the Vienna Abstract Machine.
Proceedings of the Logic Programming, 1995

High-Level Constraints over Finite Domains.
Proceedings of the Constraint Processing, Selected Papers, 1995

Decomposed software pipelining with reduced register requirement.
Proceedings of the IFIP WG10.3 working conference on Parallel architectures and compilation techniques, 1995

1994
Implementation techniques for Prolog.
Proceedings of the Tenth Logic Programming Workshop, 1994

A Progress Report on Incremental Global Compilation of Prolog.
Proceedings of the ILPS 1994, 1994

Dependence-Conscious Global Register Allocation.
Proceedings of the Programming Languages and System Architectures, 1994

Improving Semi-static Branch Prediction by Code Replication.
Proceedings of the ACM SIGPLAN'94 Conference on Programming Language Design and Implementation (PLDI), 1994

Software pipelining with register allocation and spilling.
Proceedings of the 27th Annual International Symposium on Microarchitecture, San Jose, California, USA, November 30, 1994

Trace Software Pipelining: A Novel Technique for Parallelization of Loops with Branches.
Proceedings of the Parallel Architectures and Compilation Techniques, 1994

Delayed Exceptions - Speculative Execution of Trapping Instructions.
Proceedings of the Compiler Construction, 5th International Conference, 1994

1993
Benutzerdefinierte Constraints.
Proceedings of the 9. Workshop Logische Programmierung, 1993

1992
Fast Prolog with VAM1p based Prolog Compiler.
Proceedings of the Programming Language Implementation and Logic Programming, 1992

Instruction Scheduling for Complex Pipelines.
Proceedings of the Compiler Construction, 1992

1991
Optimal Instruction Scheduling using Constraint Logic Programming.
Proceedings of the Programming Language Implementation and Logic Programming, 1991

1990
The Vienna Abstract Machine.
Proceedings of the Programming Language Implementation and Logic Programming, 1990

1987
Implementation of a high-speed Prolog interpreter.
Proceedings of the Symposium on Interpreters and Interpretive Techniques, 1987, St. Paul, Minnesota, USA, June 24, 1987

VIP: Eine integrierte Programmierumgebung für Prolog.
Proceedings of the 3. Österreichische Artificial Intelligence-Tagung, 1987

1985
PEG - Ein Programmierumgebungsgenerator.
Proceedings of the GI/OCG/ÖGI-Jahrestagung 1985, 1985


  Loading...