Andreas J. Gotterba
According to our database1,
Andreas J. Gotterba
authored at least 3 papers
between 2016 and 2017.
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Bibliography
2017
IEEE J. Solid State Circuits, 2017
2016
A 28 nm 2 Mbit 6 T SRAM With Highly Configurable Low-Voltage Write-Ability Assist Implementation and Capacitor-Based Sense-Amplifier Input Offset Compensation.
IEEE J. Solid State Circuits, 2016
Reconfigurable, conditional pre-charge SRAM: Lowering read power by leveraging data statistics.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016