Andreas Gerstlauer
Orcid: 0000-0002-6748-2054Affiliations:
- University of Texas at Austin, USA
According to our database1,
Andreas Gerstlauer
authored at least 166 papers
between 2000 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
-
on dl.acm.org
On csauthors.net:
Bibliography
2024
A Hierarchical Classification Method for High-accuracy Instruction Disassembly with Near-field EM Measurements.
ACM Trans. Embed. Comput. Syst., January, 2024
CoRR, 2024
IEEE Comput. Archit. Lett., 2024
Proceedings of the 13th International Workshop on Hardware and Architectural Support for Security and Privacy, 2024
Proceedings of the 32nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2024
2023
IEEE Trans. Computers, April, 2023
ACM Trans. Design Autom. Electr. Syst., March, 2023
Performance and Energy Simulation of Spiking Neuromorphic Architectures for Fast Exploration.
Proceedings of the 2023 International Conference on Neuromorphic Systems, 2023
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023
Proceedings of the 35th Euromicro Conference on Real-Time Systems, 2023
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2023
Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023
2022
ACM Trans. Design Autom. Electr. Syst., 2022
Characterizing Approximate Adders and Multipliers for Mitigating Aging and Temperature Degradations.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
CASPHAr: Cache-Managed Accelerator Staging and Pipelining in Heterogeneous System Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
High-Level Simulation of Embedded Software Vulnerabilities to EM Side-Channel Attacks.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2022
Memory Utilization-Based Dynamic Bandwidth Regulation for Temporal Isolation in Multi-Cores.
Proceedings of the 28th IEEE Real-Time and Embedded Technology and Applications Symposium, 2022
MAFAT: Memory-Aware Fusing and Tiling of Neural Networks for Accelerated Edge Inference.
Proceedings of the Designing Modern Embedded Systems: Software, Hardware, and Applications, 2022
Proceedings of the ICS '22: 2022 International Conference on Supercomputing, Virtual Event, June 28, 2022
2021
IEEE Trans. Very Large Scale Integr. Syst., 2021
Hardware Accelerator Integration Tradeoffs for High-Performance Computing: A Case Study of GEMM Acceleration in N-Body Methods.
IEEE Trans. Parallel Distributed Syst., 2021
Horizontal Side-Channel Vulnerabilities of Post-Quantum Key Exchange and Encapsulation Protocols.
ACM Trans. Embed. Comput. Syst., 2021
Int. J. Parallel Program., 2021
Report on the 2020 Embedded Systems Week (ESWEEK): A Virtual Event during a Pandemic, September 20-25.
IEEE Des. Test, 2021
ACM Comput. Surv., 2021
CoRR, 2021
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2021
Learning based Memory Interference Prediction for Co-running Applications on Multi-Cores.
Proceedings of the 3rd ACM/IEEE Workshop on Machine Learning for CAD, 2021
Learning-Based Workload Phase Classification and Prediction Using Performance Monitoring Counters.
Proceedings of the 3rd ACM/IEEE Workshop on Machine Learning for CAD, 2021
Virtual-Link: A Scalable Multi-Producer Multi-Consumer Message Queue Architecture for Cross-Core Communication.
Proceedings of the 35th IEEE International Parallel and Distributed Processing Symposium, 2021
Proceedings of the ICPP 2021: 50th International Conference on Parallel Processing, Lemont, IL, USA, August 9, 2021
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
2020
ACM Trans. Embed. Comput. Syst., 2020
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Proceedings of the 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems, 2020
Off-Chip Congestion Management for GPU-based Non-Uniform Processing-in-Memory Networks.
Proceedings of the 28th Euromicro International Conference on Parallel, 2020
The Non-Uniform Compute Device (NUCD) Architecture for Lightweight Accelerator Offload.
Proceedings of the 28th Euromicro International Conference on Parallel, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Runtime Accuracy-Configurable Approximate Hardware Synthesis Using Logic Gating and Relaxation.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
TAFE: Thread Address Footprint Estimation for Capturing Data/Thread Locality in GPU Systems.
Proceedings of the PACT '20: International Conference on Parallel Architectures and Compilation Techniques, 2020
2019
Quality/Latency-Aware Real-time Scheduling of Distributed Streaming IoT Applications.
ACM Trans. Embed. Comput. Syst., 2019
IEEE Trans. Computers, 2019
A Study of Core Utilization and Residency in Heterogeneous Smart Phone Architectures.
Proceedings of the 2019 ACM/SPEC International Conference on Performance Engineering, 2019
Proceedings of the 2019 IEEE International Systems Conference, 2019
Real-Time Rate Distortion Optimized and Adaptive Low Complexity Algorithms for Video Streaming.
Proceedings of the 2019 IEEE International Systems Conference, 2019
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Using Power-Anomalies to Counter Evasive Micro-Architectural Attacks in Embedded Systems.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2019
Proceedings of the Approximate Circuits, Methodologies and CAD., 2019
2018
ACM Trans. Design Autom. Electr. Syst., 2018
DeepThings: Distributed Adaptive Deep Learning Inference on Resource-Constrained IoT Edge Clusters.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Start Late or Finish Early: A Distributed Graph Processing System with Redundancy Reduction.
Proc. VLDB Endow., 2018
Data-Dependent Loop Approximations for Performance-Quality Driven High-Level Synthesis.
IEEE Embed. Syst. Lett., 2018
MASES: Mobility And Slack Enhanced Scheduling For Latency-Optimized Pipelined Dataflow Graphs.
Proceedings of the 21st International Workshop on Software and Compilers for Embedded Systems, 2018
Proceedings of the 36th IEEE International Conference on Computer Design, 2018
Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018
CAMP: Accurate modeling of core and memory locality for proxy generation of big-data applications.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
2017
Proceedings of the Handbook of Hardware/Software Codesign., 2017
Proceedings of the Handbook of Hardware/Software Codesign., 2017
Proceedings of the Handbook of Hardware/Software Codesign., 2017
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
Int. J. Parallel Program., 2017
Guest Editorial: Special Issue on the 2015 International Conference on Embedded Computer Systems - Architectures, Modeling and Simulation (SAMOS XV).
Int. J. Parallel Program., 2017
IEEE Embed. Syst. Lett., 2017
Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017
Proceedings of the 4th IEEE/ACM International Conference on Mobile Software Engineering and Systems, 2017
Proceedings of the Eighth International Green and Sustainable Computing Conference, 2017
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
Exploring Heterogeneous-ISA Core Architectures for High-Performance and Energy-Efficient Mobile SoCs.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
High-level synthesis of approximate hardware under joint precision and voltage scaling.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
2016
Proceedings of the Winter Simulation Conference, 2016
Genesys: Automatically generating representative training sets for predictive benchmarking.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016
Proceedings of the 45th International Conference on Parallel Processing Workshops, 2016
Proceedings of the 45th International Conference on Parallel Processing, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
Fine-grained power analysis of emerging graph processing workloads for cloud operations management.
Proceedings of the 2016 IEEE International Conference on Big Data (IEEE BigData 2016), 2016
2015
IEEE Trans. Veh. Technol., 2015
Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
Dynamic power and performance back-annotation for fast and accurate functional hardware simulation.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
The next generation of virtual prototyping: ultra-fast yet accurate simulation of HW/SW systems.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
2014
A Highly Efficient Multicore Floating-Point FFT Architecture Based on Hybrid Linear Algebra/FFT Cores.
J. Signal Process. Syst., 2014
Host-Compiled Multicore System Simulation for Early Real-Time Performance Evaluation.
ACM Trans. Embed. Comput. Syst., 2014
Algorithm, Architecture, and Floating-Point Unit Codesign of a Matrix Factorization Accelerator.
IEEE Trans. Computers, 2014
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014
Proceedings of the 20th IEEE International Conference on Parallel and Distributed Systems, 2014
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
2013
Circuit-Level Timing-Error Acceptance for Design of Energy-Efficient DCT/IDCT-Based Systems.
IEEE Trans. Circuits Syst. Video Technol., 2013
Simul., 2013
Fine Grain Precision Scaling for Datapath Approximations in Digital Signal Processing Systems.
Proceedings of the VLSI-SoC: At the Crossroads of Emerging Trends, 2013
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013
Proceedings of the SIGSIM Principles of Advanced Discrete Simulation, 2013
Proceedings of the International Symposium on Quality Electronic Design, 2013
Hardware and Software Implementations of Prim's Algorithm for Efficient Minimum Spanning Tree Computation.
Proceedings of the Embedded Systems: Design, Analysis and Verification, 2013
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Automated, retargetable back-annotation for host compiled performance and power modeling.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013
Proceedings of the 24th International Conference on Application-Specific Systems, 2013
Proceedings of the 24th International Conference on Application-Specific Systems, 2013
Proceedings of the 21st IEEE Symposium on Computer Arithmetic, 2013
2012
Communication-aware Heterogeneous Multiprocessor Mapping for Real-time Streaming Systems.
J. Signal Process. Syst., 2012
IEEE Trans. Computers, 2012
IEEE Embed. Syst. Lett., 2012
On the Efficiency of Register File versus Broadcast Interconnect for Collective Communications in Data-Parallel Hardware Accelerators.
Proceedings of the IEEE 24th International Symposium on Computer Architecture and High Performance Computing, 2012
Proceedings of the IEEE International Conference on IC Design & Technology, 2012
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012
Synthesis of optimized hardware transactors from abstract communication specifications.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
Proceedings of the 23rd IEEE International Conference on Application-Specific Systems, 2012
Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012
2011
Proceedings of the 74th IEEE Vehicular Technology Conference, 2011
Proceedings of the IEEE International Conference on Acoustics, 2011
A programmable and configurable multi-port System-on-Chip for stimulating electrokinetically-driven microfluidic devices.
Proceedings of the 33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2011
Proceedings of the 15th IEEE/ACM International Symposium on Distributed Simulation and Real Time Applications, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
Proceedings of the 22nd IEEE International Conference on Application-specific Systems, 2011
2010
ACM Trans. Design Autom. Electr. Syst., 2010
A system-level synthesis approach from formal application models to generic bus-based MPSoCs.
Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010
Proceedings of the 21st IEEE International Symposium on Rapid System Prototyping, 2010
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
2009
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
Proceedings of the Analysis, 2009
Introduction to hardware-dependent software design hardware-dependent software for multi- and many-core embedded systems.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
2008
An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors.
IEEE Trans. Very Large Scale Integr. Syst., 2008
EURASIP J. Embed. Syst., 2008
Proceedings of the 45th Design Automation Conference, 2008
Automatic generation of hardware dependent software for MPSoCs from abstract system specifications.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008
2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
Proceedings of the Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30, 2007
Proceedings of the Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30, 2007
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
2006
Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006
2005
Proceedings of the From Specification to Embedded Systems Application [International Embedded Systems Symposium, 2005
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Multi-metric and multi-entity characterization of applications for early system design exploration.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
Proceedings of the 41th Design Automation Conference, 2004
2003
Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003
Proceedings of the Embedded Software for SoC, 2003
2002
Seamless approach for the design of control systems for power electronics and electric drives.
Proceedings of the IEEE International Conference on Systems, Man and Cybernetics: Bridging the Digital Divide, Yasmine Hammamet, Tunisia, October 6-9, 2002, 2002
Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002
Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002
Proceedings of the 2002 IEEE International Symposium on Intelligent Control, 2002
2001
Springer, ISBN: 978-0-7923-7387-2, 2001
2000
The Specification Language SpecC within the PARADISE Design Environment.
Proceedings of the Architecture and Design of Distributed Embedded Systems, 2000