Andreas Genser

According to our database1, Andreas Genser authored at least 18 papers between 2009 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2019
A Hardware-Accelerated Estimation-Based Power Profiling Unit - Enabling Early Power-Aware Embedded Software Design and On-Chip Power Management.
Trans. High Perform. Embed. Archit. Compil., 2019

2013
Hardware accelerated smart-card software evaluation supported by information leakage and activity sensors.
J. Inf. Secur. Appl., 2013

Emulation-Based Test and Verification of a Design's Functional, Performance, Power, and Supply Voltage Behavior.
Proceedings of the 21st Euromicro International Conference on Parallel, 2013

2012
Characterization and handling of low-cost micro-architectural signatures in MPSoCs.
Proceedings of the 17th IEEE European Test Symposium, 2012

Adaptive Field Strength ScalingL: A Power Optimization Technique for Contactless Reader / Smart Card Systems.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Estimation based power and supply voltage management for future RF-powered multi-core smart cards.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
An Automated Power Emulation Framework for Embedded Software - Detecting Power-Critical Code Regions and Optimizing Software-Induced Power Consumption Peaks.
J. Low Power Electron., 2011

Supply voltage emulation platform for DVFS voltage drop compensation explorations.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2011

2010
Power-aware hardware/software codesign of mobile devices.
Elektrotech. Informationstechnik, 2010

An Automated Framework for Power-Critical Code Region Detection and Power Peak Optimization of Embedded Software.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2010

Power emulation: Methodology and applications for HW/SW power optimization.
Proceedings of the 8th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2010), 2010

Power emulation based DVFS efficiency investigations for embedded systems.
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010

Automated Power Characterization for Run-Time Power Emulation of SoC Designs.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

Estimation-based run-time power profile flattening for RF-powered smart card systems.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009
An emulation-based real-time power profiling unit for embedded software.
Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, 2009

Accelerating Embedded Software Power Profiling Using Run-Time Power Emulation.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009

A low-power ASIP for IEEE 802.15.4a ultra-wideband impulse radio baseband processing.
Proceedings of the Design, Automation and Test in Europe, 2009

Low-Power ASIP Architecture Exploration and Optimization for Reed-Solomon Processing.
Proceedings of the 20th IEEE International Conference on Application-Specific Systems, 2009


  Loading...