Andreas Dixius
According to our database1,
Andreas Dixius
authored at least 14 papers
between 2015 and 2023.
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Bibliography
2023
A Low-Power Hardware Accelerator of MFCC Extraction for Keyword Spotting in 22nm FDSOI.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
2022
A 16-Channel Fully Configurable Neural SoC With 1.52 $\mu$W/Ch Signal Acquisition, 2.79 $\mu$W/Ch Real-Time Spike Classifier, and 1.79 TOPS/W Deep Neural Network Accelerator in 22 nm FDSOI.
IEEE Trans. Biomed. Circuits Syst., 2022
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022
2021
IEEE Trans. Very Large Scale Integr. Syst., 2021
The SpiNNaker 2 Processing Element Architecture for Hybrid Digital Neuromorphic Computing.
CoRR, 2021
2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
2018
Approximate Fixed-Point Elementary Function Accelerator for the SpiNNaker-2 Neuromorphic Chip.
Proceedings of the 25th IEEE Symposium on Computer Arithmetic, 2018
2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Live demonstration: Dynamic voltage and frequency scaling for neuromorphic many-core systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
2016
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
2015
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015