Andreas Böttcher

According to our database, Andreas Böttcher authored at least 7 papers between 1992 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2024

Multiplier Design Addressing Area-Delay Trade-offs by using DSP and Logic resources on FPGAs.

Andreas Böttcher, Martin Kumm

Proceedings of the 35th IEEE International Conference on Application-specific Systems, 2024

Small Logic-based Multipliers with Incomplete Sub-Multipliers for FPGAs.

Andreas Böttcher, Martin Kumm

Proceedings of the 31st IEEE Symposium on Computer Arithmetic, 2024

2023

Towards Globally Optimal Design of Multipliers for FPGAs.

Andreas Böttcher, Martin Kumm

IEEE Trans. Computers, May, 2023

2022

Resource Optimal Squarers for FPGAs.

Andreas Böttcher, Martin Kumm, Florent de Dinechin

Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

2021

Resource Optimal Truncated Multipliers for FPGAs.

Andreas Böttcher, Martin Kumm, Florent de Dinechin

Proceedings of the 28th IEEE Symposium on Computer Arithmetic, 2021

2020

Heuristics for the Design of Large Multipliers for FPGAs.

Andreas Böttcher, Keanu Kullmann, Martin Kumm

Proceedings of the 27th IEEE Symposium on Computer Arithmetic, 2020

1992

Closing the parallel gap: a data structure architecture.

Andreas Böttcher

PhD thesis, 1992