Andreas Bahr

Orcid: 0000-0001-8012-6794

According to our database1, Andreas Bahr authored at least 14 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A Fully Integrated Negative Output Voltage Charge Pump for Implantable Single Photon Imagers.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

Modeling of CMOS Integrated Strain Sensors and Sensitivity Enhanced Readout Architecture.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024

3.35V High Voltage Electroforming Generator in 28nm with 5.3mV ripple and 46% efficiency for HfO2-based Memristors.
Proceedings of the 20th International Conference on Synthesis, 2024

A Compressed Sensing Integrate-and-Fire Neuron Concept for Massively Parallel Recordings.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
Low Frequency and Low Power Oscillator using Thyristor-Based Delay Elements for Optoelectronic Implants.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2022
Quantitative Evaluation for Magnetoelectric Sensor Systems in Biomagnetic Diagnostics.
Sensors, 2022

Study of Chopping Magnetic Flux Modulation on Surface Acoustic Wave Magnetic Sensor.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

Digital Approaches on Frequency Tuning for Magnetoelectric Sensors.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021
EEG of Genetic Absence Epilepsy Rats (GAERS).
Dataset, June, 2021

Modeling and Parallel Operation of Exchange-Biased Delta-E Effect Magnetometers for Sensor Arrays.
Sensors, 2021

Phase Noise of SAW Delay Line Magnetic Field Sensors.
Sensors, 2021

A CMOS Integrated Low-Power, Ultra-Low-Frequency Relaxation Oscillator for Neuromorphic Applications.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

2016
Small area, low power neural recording integrated circuit in 130 nm CMOS technology for small mammalians.
Proceedings of the 28th International Conference on Microelectronics, 2016

Integrated 16-Channel Neural Recording Circuit with SPI Interface and Error Correction Code in 130Nm CMOS Technology.
Proceedings of the 9th International Joint Conference on Biomedical Engineering Systems and Technologies (BIOSTEC 2016), 2016


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