Andrea Pierazzi
According to our database1,
Andrea Pierazzi
authored at least 4 papers
between 1998 and 2001.
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Bibliography
2001
IEEE J. Solid State Circuits, 2001
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001
1998
Yield Enhancement by Multi-level Linear Modeling of Non-Idealities in an Interpolated Flash ADCs.
Proceedings of the 13th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '98), 1998