André Lucas Chinazzo

According to our database1, André Lucas Chinazzo authored at least 10 papers between 2015 and 2024.

Collaborative distances:

Timeline

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2024
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Bibliography

2024
Enabling cell selection optimization for non-traditional CMOS topologies.
Proceedings of the 21st International SoC Design Conference, 2024

2022
Investigation of Pass Transistor Logic in a 12nm FinFET CMOS Technology.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

Machine learning based soft error rate estimation of pass transistor logic in high-speed communication.
Proceedings of the IEEE European Test Symposium, 2022

Revisiting Pass-Transistor Logic Styles in a 12nm FinFET Technology Node.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

A Custom Hardware Architecture for the Link Assessment Problem.
Proceedings of the Algorithms for Big Data - DFG Priority Program 1736, 2022

Increasing the Sampling Efficiency for the Link Assessment Problem.
Proceedings of the Algorithms for Big Data - DFG Priority Program 1736, 2022

2019
RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

2017
Low cost automatic test vector generation for structural analog testing.
Proceedings of the 18th IEEE Latin American Test Symposium, 2017

2016
Increasing sampling efficiency for the fixed degree sequence model with phase transitions.
Soc. Netw. Anal. Min., 2016

2015
Exploiting Phase Transitions for the Efficient Sampling of the Fixed Degree Sequence Model.
Proceedings of the 2015 IEEE/ACM International Conference on Advances in Social Networks Analysis and Mining, 2015


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