André Bannwart Perina

According to our database, André Bannwart Perina authored at least 7 papers between 2014 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Fast Resource and Timing Aware Design Optimisation for High-Level Synthesis.

André B. Perina, Arthur Silitonga, Jürgen Becker, Vanderlei Bonato

IEEE Trans. Computers, 2021

2019

Lina: Timing-Constrained High-Level Synthesis Performance Estimator for Fast DSE.

André Bannwart Perina, Jürgen Becker, Vanderlei Bonato

Proceedings of the International Conference on Field-Programmable Technology, 2019

ProfCounter: Line-Level Cycle Counter for Xilinx OpenCL High-Level Synthesis.

André Bannwart Perina, Jürgen Becker, Vanderlei Bonato

Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

2018

Mapping Estimator for OpenCL Heterogeneous Accelerators.

André Bannwart Perina, Vanderlei Bonato

Proceedings of the International Conference on Field-Programmable Technology, 2018

2017

Exploiting Kant and Kimura's Matrix Inversion Algorithm on FPGA.

André B. Perina, Paulo Matias, Eduardo Marques, Vanderlei Bonato, João Miguel Gago Pontes de Brito Lima

Proceedings of the Euromicro Conference on Digital System Design, 2017

2014

A Parallel Hardware Architecture based on Node-Depth Encoding to Solve Network Design Problems.

Marcilyanne Moreira Gois, Paulo Matias, André Bannwart Perina, Vanderlei Bonato, Alexandre C. B. Delbem

Int. J. Nat. Comput. Res., 2014

Representation of Evolutionary Algorithms in FPGA Cluster for Project of Large-Scale Networks.

André Bannwart Perina, Marcilyanne Moreira Gois, Paulo Matias, João M. P. Cardoso, Alexandre C. B. Delbem, Vanderlei Bonato

CoRR, 2014