Andleeb Zahra

According to our database, Andleeb Zahra authored at least 13 papers between 2018 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

A 275 pW, 0.5 V supply insensitive gate-leakage based current/voltage reference circuit for a wide temperature range of -55 to 100 °C without using amplifiers and resistors.

Bhartipudi Sahishnavi, Arnab Dey, Anubhab Banerjee, Andleeb Zahra, Zia Abbas

Microelectron. J., 2024

An inductor-less, cost-effective On-chip CMOS VNA for bio-molecule detection.

Bhartipudi Sahishnavi, Samriddhi Agarwal, Shameer Basha Yerragudi, Naveen Dasari, Andleeb Zahra, Prabhakar Bhimalapuram, Syed Azeemuddin, Zia Abbas

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023

AI/ML algorithms and applications in VLSI design and technology.

Deepthi Amuru, Andleeb Zahra, Harsha V. Vudumula, Pavan K. Cherupally, Sushanth R. Gurram, Amir Ahmad, Zia Abbas

Integr., November, 2023

Approximate Toom-Cook FFT with sparsity aware error tuning in a shared memory architecture.

Mohammed Salman Ahmed, Md. Kalesha, Andleeb Zahra, Zia Abbas

Integr., March, 2023

Design and Fabrication of Microfluidic Chip for Temperature Control Applications in Biomedical.

Andleeb Zahra, Giampiero de Cesare, Domenico Caputo, Nicola Lovecchio, Prabhakar Bhimalapuram, Syed Azeemuddin, Zia Abbas

Proceedings of the 16th International Conference on Sensing Technology, 2023

A Label-Free Low-Cost Radio Frequency Driven Noninvasive Lab-on-Chip System for Creatinine Detection.

Swarnim Sinha, Andleeb Zahra, Imran Siddiqui, Pawan Kumar, Alimpan Modak, Prabhakar Bhimalapuram, Tapan Sau, Syed Azeemuddin, Zia Abbas

Proceedings of the 16th International Conference on Sensing Technology, 2023

A High PSRR CMOS Voltage and Current Reference in One Circuit Without Amplifier for Low Power Applications.

Ashutosh Pathy, Andleeb Zahra, Amir Ahmad, Zia Abbas

Proceedings of the International Conference on Microelectronics, 2023

Design of Approximate Full Adders for Error Resilient Applications.

Deepthi Amuru, Andleeb Zahra, Varnika Karakuram, Zia Abbas

Proceedings of the International Conference on Computer and Applications, 2023

2021

PVT and Aging Degradation Invariant Automated Optimization Approach for CMOS Low-Power High-Performance VLSI Circuits.

Hema Sai Kalluru, Prasenjit Saha, Andleeb Zahra, Zia Abbas

Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

Algorithm Driven Power-Timing Optimization Methodology for CMOS Digital Circuits Considering PVTA Variations.

Hema Sai Kalluru, Prasenjit Saha, Andleeb Zahra, Zia Abbas

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2019

Statistical Variation Aware Leakage and Total Power Estimation of 16 nm VLSI Digital Circuits Based on Regression Models.

Deepthi Amuru, Andleeb Zahra, Zia Abbas

Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019

A Highly Accurate Machine Learning Approach to Modelling PVT Variation Aware Leakage Power in FinFET Digital Circuits.

Shirisha Gourishetty, Harshini Mandadapu, Andleeb Zahra, Zia Abbas

Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019

2018

LEADER: Leakage Currents Estimation Technique for Aging Degradation Aware 16 nm CMOS Circuits.

Zia Abbas, Andleeb Zahra, Mauro Olivieri

Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018