Anastasia Volkova

Orcid: 0000-0002-0702-5652

Affiliations:
  • University of Nantes, France


According to our database1, Anastasia Volkova authored at least 25 papers between 2015 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Towards Fixed-Point Formats Determination for Faust Programs.
CoRR, 2024

2023
Sound Mixed Fixed-Point Quantization of Neural Networks.
ACM Trans. Embed. Comput. Syst., October, 2023

Toward the Multiple Constant Multiplication at Minimal Hardware Cost.
IEEE Trans. Circuits Syst. I Regul. Pap., May, 2023

Design of Optimal Multiplierless FIR Filters With Minimal Number of Adders.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2023

Multiple Constant Multiplication: From Target Constants to Optimized Pipelined Adder Graphs.
Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

Hardware-Optimal Digital FIR Filters: One ILP to Rule Them all and in Faithfulness Bind Them.
Proceedings of the 57th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2023, Pacific Grove, CA, USA, October 29, 2023

2022
Hardware-Aware Design of Multiplierless Second-Order IIR Filters With Minimum Adders.
IEEE Trans. Signal Process., 2022

Towards the Multiple Constant Multiplication at Minimal Hardware Cost.
CoRR, 2022

Dandelion: Certified Approximations of Elementary Functions.
Proceedings of the 13th International Conference on Interactive Theorem Proving, 2022

Truncated Multiple Constant Multiplication with Minimal Number of Full Adders.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Hardware-Aware Quantization for Multiplierless Neural Network Controllers.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

2021
Towards Arithmetic-Centered Filter Design.
Proceedings of the 28th IEEE Symposium on Computer Arithmetic, 2021

2020
Arithmetic Approaches for Rigorous Design of Reliable Fixed-Point LTI Filters.
IEEE Trans. Computers, 2020

A Framework for Semi-Automatic Precision and Accuracy Analysis for Fast and Rigorous Deep Learning.
Proceedings of the 27th IEEE Symposium on Computer Arithmetic, 2020

2019
Towards Hardware IIR Filters Computing Just Right: Direct Form I Case Study.
IEEE Trans. Computers, 2019

Sound Approximation of Programs with Elementary Functions.
Proceedings of the Computer Aided Verification - 31st International Conference, 2019

Semi-Automatic Implementation of the Complementary Error Function.
Proceedings of the 26th IEEE Symposium on Computer Arithmetic, 2019

2017
Towards reliable implementation of digital filters. (Vers une implémentation fiable des filtres numériques).
PhD thesis, 2017

Error analysis methods for the fixed-point implementation of linear systems.
Proceedings of the 2017 IEEE International Workshop on Signal Processing Systems, 2017

Multiplierless unified architecture for mixed radix-2/3/4 FFTs.
Proceedings of the 25th European Signal Processing Conference, 2017

Reliable Verification of Digital Implemented Filters Against Frequency Specifications.
Proceedings of the 24th IEEE Symposium on Computer Arithmetic, 2017

2016
Reliable Fixed-Point Implementation of Linear Data-Flows.
Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016

2015
Fixed-point implementation of Lattice Wave Digital Filter: Comparison and error analysis.
Proceedings of the 23rd European Signal Processing Conference, 2015

Reliable Evaluation of the Worst-Case Peak Gain Matrix in Multiple Precision.
Proceedings of the 22nd IEEE Symposium on Computer Arithmetic, 2015

Determining fixed-point formats for a digital filter implementation using the worst-case peak gain measure.
Proceedings of the 49th Asilomar Conference on Signals, Systems and Computers, 2015


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