Ananth Hegde

According to our database1, Ananth Hegde authored at least 2 papers between 2003 and 2004.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2004
ChipPower: an architecture-level leakage simulator.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

2003
VL-CDRAM: variable line sized cached DRAMs.
Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003


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