Anant Nori
According to our database1,
Anant Nori
authored at least 19 papers
between 2018 and 2024.
Collaborative distances:
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Bibliography
2024
SN Comput. Sci., June, 2024
Constable: Improving Performance and Power Efficiency by Safely Eliminating Load Instruction Execution.
Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024
2022
Dataset, July, 2022
Proceedings of the SC22: International Conference for High Performance Computing, 2022
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022
Proceedings of the IEEE High Performance Extreme Computing Conference, 2022
Proceedings of the 11th International Conference on Data Science, 2022
Proceedings of the CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17, 2022
2021
pLUTo: In-DRAM Lookup Tables to Enable Massively Parallel General-Purpose Computation.
CoRR, 2021
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
REDUCT: Keep it Close, Keep it Cool! : Efficient Scaling of DNN Inference on Multi-core CPUs with Near-Cache Compute.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
2020
Proximu: Efficiently Scaling DNN Inference in Multi-core CPUs through Near-Cache Compute.
CoRR, 2020
GenASM: A High-Performance, Low-Power Approximate String Matching Acceleration Framework for Genome Sequence Analysis.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020
Characterization of Data Generating Neural Network Applications on x86 CPU Architecture.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2020
2019
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019
2018
Criticality Aware Tiered Cache Hierarchy: A Fundamental Relook at Multi-Level Cache Hierarchies.
Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018
Closed yet open DRAM: achieving low latency and high performance in DRAM memory systems.
Proceedings of the 55th Annual Design Automation Conference, 2018