Ananda Y. R.

According to our database, Ananda Y. R. authored at least 8 papers between 2018 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2023

A MOS-DTMOS Implementation of Floating Memristor Emulator for High-Frequency Applications.

Ananda Y. R., Nehal Raj, Gaurav Trivedi

IEEE Trans. Very Large Scale Integr. Syst., March, 2023

A High Frequency MOS-Based Floating Charge-Controlled Memcapacitor Emulator.

Ananda Y. R., Gadipelli Sriharsha Satyanarayan, Gaurav Trivedi

IEEE Trans. Circuits Syst. II Express Briefs, March, 2023

An Adaptive Window Function based Memristor Model.

Ananda Y. R., Arkadeep Hajra, Gaurav Trivedi

Proceedings of the 33rd International Conference Radioelektronika, 2023

A Novel Dynamic Memristor Window Function for High Frequency Applications.

Ananda Y. R., Subhashis Das, Gaurav Trivedi

Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

2022

An Optimized MOS-Based High Frequency Charge-Controlled Memcapacitor Emulator.

Ananda Y. R., Gadipelli Sriharsha Satyanarayan, Gaurav Trivedi

IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

A Flux Controlled MOS-Based Optimized High Frequency Meminductor Emulator.

Ananda Y. R., Gadipelli Sriharsha Satyanarayan, Gaurav Trivedi

IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

2018

Source Hotspot Management in a Mesh Network on Chip.

Ajay S, Satya Sai Krishna Mohan G, Shashank S Rao, Sujay B Shaunak, Krutthika H. K, Ananda Y. R., John Jose

Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

Implementation of a Novel Fault Tolerant Routing Technique for Mesh Network on Chip.

Akshay B. P., Ganesh K. M., Thippeswamy D. R., Vishnu S. Bhat, Anitha Vijayakumar, Ananda Y. R., John Jose

Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018