Ananda Samajdar

According to our database, Ananda Samajdar authored at least 19 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

Towards Efficient Neuro-Symbolic AI: From Workload Characterization to Hardware Architecture.

Zishen Wan, Che-Kai Liu, Hanchen Yang, Ritik Raj, Chaojian Li, Haoran You, Yonggan Fu, Cheng Wan, Sixu Li, Youbin Kim, Ananda Samajdar, Yingyan Celine Lin, Mohamed Ibrahim, Jan M. Rabaey, Tushar Krishna, Arijit Raychowdhury

CoRR, 2024

Towards Cognitive AI Systems: Workload and Characterization of Neuro-Symbolic AI.

Zishen Wan, Che-Kai Liu, Hanchen Yang, Ritik Raj, Chaojian Li, Haoran You, Yonggan Fu, Cheng Wan, Ananda Samajdar, Yingyan Celine Lin, Tushar Krishna, Arijit Raychowdhury

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2024

2023

AIrchitect: Automating Hardware Architecture and Mapping Optimization.

Ananda Samajdar, Jan Moritz Joseph, Tushar Krishna

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022

Methodology and Analysis for Efficient Custom Architecture Design using Machine Learning.

Ananda Samajdar

PhD thesis, 2022

Self adaptive reconfigurable arrays (SARA): learning flexible GEMM accelerator configuration and mapping-space using ML.

Ananda Samajdar, Eric Qin, Michael Pellauer, Tushar Krishna

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021

AIRCHITECT: Learning Custom Architecture Design and Mapping Space.

Ananda Samajdar, Jan Moritz Joseph, Matthew Denton, Tushar Krishna

CoRR, 2021

Self-Adaptive Reconfigurable Arrays (SARA): Using ML to Assist Scaling GEMM Acceleration.

Ananda Samajdar, Michael Pellauer, Tushar Krishna

CoRR, 2021

Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators.

Jan Moritz Joseph, Ananda Samajdar, Lingjun Zhu, Rainer Leupers, Sung Kyu Lim, Thilo Pionteck, Tushar Krishna

Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU.

Geonhwa Jeong, Eric Qin, Ananda Samajdar, Christopher J. Hughes, Sreenivas Subramoney, Hyesoon Kim, Tushar Krishna

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020

Data Orchestration in Deep Learning Accelerators

Tushar Krishna, Hyoukjun Kwon, Angshuman Parashar, Michael Pellauer, Ananda Samajdar

Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01767-4, 2020

A Systematic Methodology for Characterizing Scalability of DNN Accelerators using SCALE-Sim.

Ananda Samajdar, Jan Moritz Joseph, Yuhao Zhu, Paul N. Whatmough, Matthew Mattina, Tushar Krishna

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2020

CLAN: Continuous Learning using Asynchronous Neuroevolution on Commodity Edge Devices.

Parth Mannan, Ananda Samajdar, Tushar Krishna

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2020

SIGMA: A Sparse and Irregular GEMM Accelerator with Flexible Interconnects for DNN Training.

Eric Qin, Ananda Samajdar, Hyoukjun Kwon, Vineet Nadella, Sudarshan Srinivasan, Dipankar Das, Bharat Kaul, Tushar Krishna

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

2019

Scaling the Cascades: Interconnect-Aware FPGA Implementation of Machine Learning Problems.

Ananda Samajdar, Tushar Garg, Tushar Krishna, Nachiket Kapre

Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

2018

A Communication-Centric Approach for Designing Flexible DNN Accelerators.

Hyoukjun Kwon, Ananda Samajdar, Tushar Krishna

IEEE Micro, 2018

SCALE-Sim: Systolic CNN Accelerator.

Ananda Samajdar, Yuhao Zhu, Paul N. Whatmough, Matthew Mattina, Tushar Krishna

CoRR, 2018

GeneSys: Enabling Continuous Learning through Neural Network Evolution in Hardware.

Ananda Samajdar, Parth Mannan, Kartikay Garg, Tushar Krishna

Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

MAERI: Enabling Flexible Dataflow Mapping over DNN Accelerators via Reconfigurable Interconnects.

Hyoukjun Kwon, Ananda Samajdar, Tushar Krishna

Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems, 2018

2017

Rethinking NoCs for Spatial Neural Network Accelerators.

Hyoukjun Kwon, Ananda Samajdar, Tushar Krishna

Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, 2017