Anand Haridass

Orcid: 0000-0003-0210-8480

According to our database1, Anand Haridass authored at least 8 papers between 2002 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
Guest Editors' Introduction: Special Issue on Benchmarking Machine Learning Systems and Applications.
IEEE Des. Test, 2022

A Survey on Machine Learning Accelerators and Evolutionary Hardware Platforms.
IEEE Des. Test, 2022

2019
Application and Thermal-reliability-aware Reinforcement Learning Based Multi-core Power Management.
ACM J. Emerg. Technol. Comput. Syst., 2019

2016
FVCAG: A framework for formal verification driven power modeling and verification.
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

2015
FirmLeak: A Framework for Efficient and Accurate Runtime Estimation of Leakage Power by Firmware.
Proceedings of the 28th International Conference on VLSI Design, 2015

FreqLeak: A frequency step based method for efficient leakage power characterization in a system.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

2010
Channel Optimization for the Design of High Speed I/O links.
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

2002
An advanced multichip module (MCM) for high-performance UNIX servers.
IBM J. Res. Dev., 2002


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