Anand D. Darji

According to our database, Anand D. Darji authored at least 44 papers between 2009 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

EchoPhaseFormer: A Transformer Based Echo Phase Detection and Analysis in 2D Echocardiography.

Gajraj Singh, Anand D. Darji, Jignesh N. Sarvaiya, Suprva Patnaik

SN Comput. Sci., October, 2024

2023

Identification of Parkinson's disease from speech signal using machine learning approach.

Sudhansu Sekhar Nayak, Anand D. Darji, Prashant K. Shah

Int. J. Speech Technol., December, 2023

Hardware implementation of 1D-CNN architecture for ECG arrhythmia classification.

Viraj Rawal, Priyank H. Prajapati, Anand D. Darji

Biomed. Signal Process. Control., August, 2023

A novel 5-bit S-box design for lightweight cryptography algorithms.

Vishal A. Thakor, Mohammad Abdur Razzaque, Anand D. Darji, Aksh R. Patel

J. Inf. Secur. Appl., March, 2023

Machine learning approach for detecting Covid-19 from speech signal using Mel frequency magnitude coefficient.

Sudhansu Sekhar Nayak, Anand D. Darji, Prashant K. Shah

Signal Image Video Process., 2023

Multimodal emotion recognition using SDA-LDA algorithm in video clips.

Pradeep Tiwari, Harshil Rathod, Sakshee Thakkar, Anand D. Darji

J. Ambient Intell. Humaniz. Comput., 2023

Design of Hardware Efficient Approximate DCT Architecture.

Vishwajeet S. B, Vaibhavi Solanki, Anand D. Darji

Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023

Analysis of PDMS Polymeric Material for Heavy Metal Ions Sensing Application.

Vishakha P. Bhale, Dinesh R. Rotake, Anand D. Darji

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023

2022

Hardware Efficient Low-Frequency Artifact Reduction Technique for Wearable ECG Device.

Priyank H. Prajapati, Anand D. Darji

IEEE Trans. Instrum. Meas., 2022

Pertinent feature selection techniques for automatic emotion recognition in stressed speech.

Pradeep Tiwari, Anand D. Darji

Int. J. Speech Technol., 2022

Design of an Autonomous Agriculture Robot for Real Time Weed Detection using CNN.

Dhruv Patel, Meet Gandhi, Shankaranarayanan H., Anand D. Darji

CoRR, 2022

Low Power and Area Efficient Approximate 2D-DCT Architecture for Wireless Capsule Endoscopy.

Vaibhavi Solanki, Rahul Ranjan Kumar, Praveen Ghagare, Anand D. Darji

Proceedings of the 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems, 2022

Hardware Design of Two Stage Reference Free Adaptive Filter for ECG Denoising.

Priyank H. Prajapati, Anand D. Darji

Proceedings of the VLSI Design and Test - 26th International Symposium, 2022

2021

Hardware Efficient Hybrid Encoder for Video Surveillance Application.

Minesh Patel, Anand D. Darji

J. Circuits Syst. Comput., 2021

Design of Low-Power Wallace Tree Multiplier Architecture Using Modular Approach.

Vaibhavi Solanki, Anand D. Darji, Harikrishna Singapuri

Circuits Syst. Signal Process., 2021

Analysis of Standard Cells performance for In0.53Ga0.47As FinFET with underlap fin length for High Speed Applications.

Jay Pathak, Anand D. Darji

Proceedings of the 25th International Symposium on VLSI Design and Test, 2021

Two Stage Step-Size Scaler Adaptive Filter Design for ECG Denoising.

Priyank H. Prajapati, Anand D. Darji

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

FPGA Implementation of MRMN with Step-Size Scaler Adaptive Filter for Impulsive Noise Reduction.

Priyank H. Prajapati, Anand D. Darji

Circuits Syst. Signal Process., 2020

CSD Optimized DWT Filter for ECG Denoising.

Gayatri Saripalli, Priyank H. Prajapati, Anand D. Darji

Proceedings of the 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020

Ultrasensitive Multi-Arm-Microcantilever-Based Piezoresistive Sensor for BioMEMS Application.

Dinesh Rotake, Anand D. Darji, Jitendra Singh

Proceedings of the 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020

An Efficient Dadda Multiplier using Approximate Adder.

Ketki C. Pathak, Jignesh N. Sarvaiya, Anand D. Darji, Shreya Diwan, Anjali Gangadwala, Zinal Bhatt, Azba Patel

Proceedings of the 2020 IEEE Region 10 Conference, 2020

2019

Assessment of interface traps in In_0.53Ga_0.47As FinFET with gate-to-source/drain underlap for sub-14 nm technology node to impede short channel effect.

Jay Pathak, Anand D. Darji

IET Circuits Devices Syst., 2019

Stability Analysis of SRAM Designed Using In0.53Ga0.47As nFinFET with Underlap Region.

Jay Pathak, Anand D. Darji

Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

Implementation of High speed, Low PowerModified Vedic Multiplier and Its Application in Lifting based Discrete Wavelet Transform.

Krupa Desai, Anand D. Darji, Harikrishna M. Singapuri

Proceedings of the TENCON 2019, 2019

2018

Automation of Timing Quality Checks and Optimization.

Dubakula Ketavanya, Anand D. Darji

Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

Stiffness and Sensitivity Analysis of Microcantilever Based Piezoresistive Sensor for Bio-MEMS Application.

Dinesh R. Rotake, Anand D. Darji

Proceedings of the 2018 IEEE SENSORS, New Delhi, India, October 28-31, 2018, 2018

2017

FPGA implementation of hardware efficient adaptive filter robust to impulsive noise.

Chintan A. Parmar, Bhaskar Ramanadham, Anand D. Darji

IET Comput. Digit. Tech., 2017

Investigation of TCADs Models for Characterization of Sub 16 nm In _0.53 Ga _0.47 As FinFET.

Jay Pathak, Anand D. Darji

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

2015

Multiplier-less pipeline architecture for lifting-based two-dimensional discrete wavelet transform.

Anand D. Darji, R. Arun, S. N. Merchant, Arun N. Chandorkar

IET Comput. Digit. Tech., 2015

High-performance multiplierless DCT architecture for HEVC.

Anand D. Darji, Raviraj P. Makwana

Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

2014

Dual-Scan Parallel Flipping Architecture for a Lifting-Based 2-D Discrete Wavelet Transform.

Anand D. Darji, Shubham Agrawal, Ankit Oza, Vipul Sinha, Aditya Verma, S. N. Merchant, Arun N. Chandorkar

IEEE Trans. Circuits Syst. II Express Briefs, 2014

High-performance hardware architectures for multi-level lifting-based discrete wavelet transform.

Anand D. Darji, Shailendra Kushwah, Shabbir N. Merchant, Arun N. Chandorkar

EURASIP J. Image Video Process., 2014

Hardware Efficient VLSI Architecture for 3-D Discrete Wavelet Transform.

Anand D. Darji, Saurabh Shukla, S. N. Merchant, Arun N. Chandorkar

Proceedings of the 2014 27th International Conference on VLSI Design, 2014

Flipping-based high speed VLSI architecture for 2-D lifting DWT.

Anand D. Darji, Konale Shashikanth, Ankur Limaye, S. N. Merchant, Arun N. Chandorkar

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Memory efficient VLSI architecture for lifting-based DWT.

Anand D. Darji, Ankur Limaye

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Hardware efficient implementation of video capsule endoscopy.

Anand D. Darji, E. Nijin

Proceedings of the IEEE 3rd Global Conference on Consumer Electronics, 2014

2013

Watermarking Hardware Based on Wavelet Coefficients Quantization Method.

Anand D. Darji, T. C. Lad, Shabbir N. Merchant, Arun N. Chandorkar

Circuits Syst. Signal Process., 2013

2012

Hardware efficient recursive VLSI architecture for multilevel lifting 2-D DWT.

Anand D. Darji, Nisarg Trivedi, S. N. Merchant, Arun N. Chandorkar

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

VLSI Implementation of Wavelet Based Robust Image Watermarking Chip.

T. C. Lad, Anand D. Darji, S. N. Merchant, Arun N. Chandorkar

Proceedings of the International Symposium on Electronic System Design, 2011

High speed VLSI architecture for 2-D lifting Discrete Wavelet Transform.

Anand D. Darji, Rajul Bansal, S. N. Merchant, Arun N. Chandorkar

Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

2010

Reading a 4-Bit SLC NAND Flash Memory in 180nm Technology.

Nilesh Shah, Rasika Dhavse, Anand D. Darji

Proceedings of the Information and Communication Technologies - International Conference, 2010

VLSI Implementation of Balanced Binary Tree Decomposition Based 2048-Point FFT/IFFT Processor for Mobile WI-Max.

Anand D. Darji, Manish S. Patil

Proceedings of the 3rd International Conference on Emerging Trends in Engineering and Technology, 2010

VLSI Architecture of DWT Based Watermark Encoder for Secure Still Digital Camera Design.

Anand D. Darji, Arun N. Chandorkar, Shabbir N. Merchant, Vipul Mistry

Proceedings of the 3rd International Conference on Emerging Trends in Engineering and Technology, 2010

2009

Efficient Dual Domain Watermarking Scheme for Secure Images.

Amit M. Joshi, Anand D. Darji

Proceedings of the ARTCom 2009, 2009