Amr Lotfy

According to our database1, Amr Lotfy authored at least 6 papers between 2011 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2016
A fast locking hybrid TDC-BB ADPLL utilizing proportional derivative digital loop filter and power gated DCO.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
A system-verilog behavioral model for PLLs for pre-silicon validation and top-down design methodology.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2012
A novel digital loop filter architecture for bang-bang ADPLL.
Proceedings of the IEEE 25th International SOC Conference, 2012

A 5-10GHz low power bang-bang all digital PLL based on programmable digital loop filter.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Modeling the response of Bang-Bang digital PLLs to phase error perturbations.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
A novel power gated digitally controlled oscillator.
Proceedings of the International Conference on Energy Aware Computing, 2011


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