Amit Berman

Orcid: 0000-0003-4502-8093

According to our database1, Amit Berman authored at least 22 papers between 2008 and 2024.

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Bibliography

2024
A Note on the Hint in the Dilithium Digital Signature Scheme.
IACR Cryptol. ePrint Arch., 2024

Design of Threshold-Constrained Indirect Quantizers.
CoRR, 2024

The Generating Idempotent Is a Minimum-Weight Codeword for Some Binary BCH Codes.
CoRR, 2024

Explicit Subcodes of Reed-Solomon Codes that Efficiently Achieve List Decoding Capacity.
Proceedings of the IEEE International Symposium on Information Theory, 2024

2023
Fast Syndrome-Based Chase Decoding of Binary BCH Codes Through Wu List Decoding.
IEEE Trans. Inf. Theory, August, 2023

Efficient Algorithms for Constructing Minimum-Weight Codewords in Some Extended Binary BCH Codes.
CoRR, 2023

Neural Modulation for Flash Memory: An Unsupervised Learning Framework for Improved Reliability.
Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023

2022
A Gröbner-Bases Approach to Syndrome-Based Fast Chase Decoding of Reed-Solomon Codes.
IEEE Trans. Inf. Theory, 2022

Repairing Reed-Solomon Codes Evaluated on Subspaces.
IEEE Trans. Inf. Theory, 2022

Exploiting Data Source Distribution to Enhance NVM Reliability.
Proceedings of the 2022 International Symposium on Memory Systems, 2022

2021
Low-Latency Modulation Scheme for Solid State Drive.
Proceedings of the MEMSYS 2021: The International Symposium on Memory Systems, Washington, USA, September 27, 2021

2020
A Groebner-bases approach to syndrome-based fast Chase decoding of Reed-Solomon codes.
CoRR, 2020

High-Performance Solid State Drive with Parallel Read Scheme.
Proceedings of the 9th Non-Volatile Memory Systems and Applications Symposium, 2020

2016
Minimal Maximum-Level Programming - Combined Cell Mapping and Coding for Faster MLC Memory.
IEEE J. Sel. Areas Commun., 2016

2013
Compression for fixed-width memories.
Proceedings of the 2013 IEEE International Symposium on Information Theory, 2013

Retired-page utilization in write-once memory - A coding perspective.
Proceedings of the 2013 IEEE International Symposium on Information Theory, 2013

Minimal Maximum-Level Programming: Faster memory access via multi-level cell sharing.
Proceedings of the 2013 IEEE Global Communications Conference, 2013

2012
Probabilistic performance of write-once memory with Linear Wom codes - Analysis and insights.
Proceedings of the 50th Annual Allerton Conference on Communication, 2012

2011
Constrained Flash memory programming.
Proceedings of the 2011 IEEE International Symposium on Information Theory Proceedings, 2011

2010
Order is power: Selective Packet Interleaving for energy efficient Networks-on-Chip.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

2009
Low-overhead error detection for Networks-on-Chip.
Proceedings of the 27th International Conference on Computer Design, 2009

2008
A 4b/Cell 8Gb NROM Data-Storage Memory with Enhanced Write Performance.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008


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