Amirali Amirsoleimani

Orcid: 0000-0001-5760-6861

According to our database1, Amirali Amirsoleimani authored at least 52 papers between 2012 and 2024.

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Bibliography

2024
WALLAX: A memristor-based Gaussian random number generator.
Neurocomputing, January, 2024

SITU: Stochastic input encoding and weight update thresholding for efficient memristive neural network in-situ training.
Neurocomputing, 2024

D2ECG: Deep-Shift DNN-based ECG Classifier for Resource Efficient Hardware Implementation.
Proceedings of the 22nd IEEE Interregional NEWCAS Conference, 2024

Manhattan Rule for Robust In-Situ Training of Memristive Deep Neural Network Accelerators.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

POD: PCM-Based Computing Platform for Object Detection in Biomedical Imaging Application.
Proceedings of the 15th IEEE Latin America Symposium on Circuits and Systems, 2024

SAR-MemPipe: A Hybrid Pipeline-SAR Memristive ADC for Analog Resistive Arrays.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Spiking Auto-Encoder Using Error Modulated Spike Timing Dependant Plasticity.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

BITLITE: Light Bit-wise Operative Vector Matrix Multiplication for Low-Resolution Platforms.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

NURODE: In-Memory Crossbar Core for Hodgkin-Huxley Model ODE-Based Computations.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Advancing Image Classification with Phase-coded Ultra-Efficient Spiking Neural Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

In-Memory Transformer Self-Attention Mechanism Using Passive Memristor Crossbar.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Toward Accurate Analysis of Channel Charge Injection in SAR ADCs' Capacitive DACs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
Spike Timing Dependent Gradient for Direct Training of Fast and Efficient Binarized Spiking Neural Networks.
IEEE J. Emerg. Sel. Topics Circuits Syst., December, 2023

A Review of Graphene-Based Memristive Neuromorphic Devices and Circuits.
Adv. Intell. Syst., October, 2023

Efficient Memristive Stochastic Differential Equation Solver.
Adv. Intell. Syst., August, 2023

Simulation of memristive crossbar arrays for seizure detection and prediction using parallel Convolutional Neural Networks.
Softw. Impacts, March, 2023

SSCAE: A Neuromorphic SNN Autoencoder for sc-RNA-seq Dimensionality Reduction.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

HUXIN: In-Memory Crossbar Core for Integration of Biologically Inspired Stochastic Neuron Models.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A Survey of Ensemble Methods for Mitigating Memristive Neural Network Non-idealities.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

HESSPROP: Mitigating Memristive DNN Weight Mapping Errors with Hessian Backpropagation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

SEVDA: Singular Value Decomposition Based Parallel Write Scheme for Memristive CNN Accelerators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

MEDSA: A Memristive-passive Delta-Sigma ADC Circuit for Detecting Neural Signals.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023

STDG: Fast and Lightweight SNN Training Technique Using Spike Temporal Locality.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023

2022
Adaptively Clock-Boosted Auto-Ranging Neural-Interface for Emerging Neuromodulation Applications.
IEEE Trans. Biomed. Circuits Syst., December, 2022

CODEX: Stochastic Encoding Method to Relax Resistive Crossbar Accelerator Design Requirements.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Seizure Detection and Prediction by Parallel Memristive Convolutional Neural Networks.
IEEE Trans. Biomed. Circuits Syst., 2022

Toward A Formalized Approach for Spike Sorting Algorithms and Hardware Evaluation.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

SDEX: Monte Carlo Simulation of Stochastic Differential Equations on Memristor Crossbars.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Design Space Exploration of Dense and Sparse Mapping Schemes for RRAM Architectures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

HYPERLOCK: In-Memory Hyperdimensional Encryption in Memristor Crossbar Array.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

PRUNIX: Non-Ideality Aware Convolutional Neural Network Pruning for Memristive Accelerators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

In-Memory Memristive Transformation Stage of Gaussian Random Number Generator.
Proceedings of the IEEE International Conference on Omni-layer Intelligent Systems, 2022

2021
AIDX: Adaptive Inference Scheme to Mitigate State-Drift in Memristive VMM Accelerators.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

2020
Complementary Metal-Oxide Semiconductor and Memristive Hardware for Neuromorphic Computing.
Adv. Intell. Syst., 2020

In-Memory Vector-Matrix Multiplication in Monolithic Complementary Metal-Oxide-Semiconductor-Memristor Integrated Circuits: Design Choices, Challenges, and Perspectives.
Adv. Intell. Syst., 2020

2018
A 2M1M Crossbar Architecture: Memory.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Logic Design on Mirrored Memristive Crossbars.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

A Memristive TaOx-Based Median Filter Design for Image Processing Application.
Proceedings of the 15th International Conference on Synthesis, 2018

2017
Modular neuron comprises of memristor-based synapse.
Neural Comput. Appl., 2017

Accurate charge transport model for nanoionic memristive devices.
Microelectron. J., 2017

A hybrid memristor-CMOS multiplier design based on memristive universal logic gates.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

STDP-based unsupervised learning of memristive spiking neural network by Morris-Lecar model.
Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

Hybrid memristor-CMOS based linear feedback shift register design.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017

A novel CVNS adder with memristive analog memory.
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017

Ultra-low power Op-Amp design with memristor-based compensation.
Proceedings of the 30th IEEE Canadian Conference on Electrical and Computer Engineering, 2017

A memristor based binary multiplier.
Proceedings of the 30th IEEE Canadian Conference on Electrical and Computer Engineering, 2017

2016
Memristor-based 4: 2 compressor cells design.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Brain-inspired pattern classification with memristive neural network using the Hodgkin-Huxley neuron.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015
Hyperbolic tangent passive resistive-type neuron.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Memristor-based linear feedback shift register based on material implication logic.
Proceedings of the European Conference on Circuit Theory and Design, 2015

2014
Optimized implementation of memristor-based full adder by material implication logic.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2012
A Large Scale Digital Simulation of Spiking Neural Networks (SNN) on Fast SystemC Simulator.
Proceedings of the 14th International Conference on Computer Modelling and Simulation, 2012


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