Amir Roth

According to our database, Amir Roth authored at least 33 papers between 1997 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2012

Flexible register management using reference counting.

Steven J. Battle, Andrew D. Hilton, Mark Hempstead, Amir Roth

Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012

Near term computing opportunities in building energy efficiency.

Amir Roth

Proceedings of the 2012 International Green Computing Conference, 2012

2010

iCFP: Tolerating All-Level Cache Misses in In-Order Processors.

Andrew D. Hilton, Santosh Nagarakatte, Amir Roth

IEEE Micro, 2010

SMT-Directory: Efficient Load-Load Ordering for SMT.

Andrew D. Hilton, Amir Roth

IEEE Comput. Archit. Lett., 2010

BOLT: Energy-efficient Out-of-Order Latency-Tolerant execution.

Andrew D. Hilton, Amir Roth

Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010

2009

Decoupled store completion/silent deterministic replay: enabling scalable data memory for CPR/CFP processors.

Andrew D. Hilton, Amir Roth

Proceedings of the 36th International Symposium on Computer Architecture (ISCA 2009), 2009

CPROB: Checkpoint Processing with Opportunistic Minimal Recovery.

Andrew D. Hilton, Neeraj Eswaran, Amir Roth

Proceedings of the PACT 2009, 2009

2008

Physical Register Reference Counting.

Amir Roth

IEEE Comput. Archit. Lett., 2008

2007

NoSQ: Store-Load Communication without a Store Queue.

Tingting Sha, Milo M. K. Martin, Amir Roth

IEEE Micro, 2007

Ginger: control independence using tag rewriting.

Andrew D. Hilton, Amir Roth

Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007

2006

Store Vulnerability Window (SVW): A Filter and Potential Replacement for Load Re-Execution.

Amir Roth

J. Instr. Level Parallelism, 2006

Serialization-Aware Mini-Graphs: Performance with Fewer Resources.

Anne Bracy, Amir Roth

Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006

2005

The implementation and evaluation of dynamic code decompression using DISE.

Marc L. Corliss, E. Christopher Lewis, Amir Roth

ACM Trans. Embed. Comput. Syst., 2005

Using DISE to protect return addresses from attack.

Marc L. Corliss, E. Christopher Lewis, Amir Roth

SIGARCH Comput. Archit. News, 2005

Scalable Store-Load Forwarding via Store Queue Index Prediction.

Tingting Sha, Milo M. K. Martin, Amir Roth

Proceedings of the 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 2005

RENO - A Rename-Based Instruction Optimizer.

Vlad Petric, Tingting Sha, Amir Roth

Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005

Store Vulnerability Window (SVW): Re-Execution Filtering for Enhanced Load Optimization.

Amir Roth

Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005

Energy-Effectiveness of Pre-Execution and Energy-Aware P-Thread Selection.

Vlad Petric, Amir Roth

Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005

Low-Overhead Interactive Debugging via Dynamic Instrumentation with DISE.

Marc L. Corliss, E. Christopher Lewis, Amir Roth

Proceedings of the 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 2005

2004

Dataflow Mini-Graphs: Amplifying Superscalar Capacity and Bandwidth.

Anne Bracy, Prashant Prahlad, Amir Roth

Proceedings of the 37th Annual International Symposium on Microarchitecture (MICRO-37 2004), 2004

2003

A DISE implementation of dynamic code decompression.

Marc L. Corliss, E. Christopher Lewis, Amir Roth

Proceedings of the 2003 Conference on Languages, 2003

DISE: A Programmable Macro Engine for Customizing Applications.

Marc L. Corliss, E. Christopher Lewis, Amir Roth

Proceedings of the 30th International Symposium on Computer Architecture (ISCA 2003), 2003

2002

A quantitative framework for automated pre-execution thread selection.

Amir Roth, Gurindar S. Sohi

Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002

Three extensions to register integration.

Vlad Petric, Anne Bracy, Amir Roth

Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002

2001

Dynamic techniques for load and load-use scheduling.

Amir Roth, Ronny Ronen, Avi Mendelson

Proc. IEEE, 2001

Squash Reuse via a Simplified Implementation of Register Integration.

Amir Roth, Gurindar S. Sohi

J. Instr. Level Parallelism, 2001

Speculative Multithreaded Processors.

Gurindar S. Sohi, Amir Roth

Computer, 2001

Speculative Data-Driven Multithreading.

Amir Roth, Gurindar S. Sohi

Proceedings of the Seventh International Symposium on High-Performance Computer Architecture (HPCA'01), 2001

2000

Register integration: a simple and efficient implementation of squash reuse.

Amir Roth, Gurindar S. Sohi

Proceedings of the 33rd Annual IEEE/ACM International Symposium on Microarchitecture, 2000

1999

Effective Jump-Pointer Prefetching for Linked Data Structures.

Amir Roth, Gurindar S. Sohi

Proceedings of the 26th Annual International Symposium on Computer Architecture, 1999

Improving virtual function call target prediction via dependence-based pre-computation.

Amir Roth, Andreas Moshovos, Gurindar S. Sohi

Proceedings of the 13th international conference on Supercomputing, 1999

1998

Dependance Based Prefetching for Linked Data Structures.

Amir Roth, Andreas Moshovos, Gurindar S. Sohi

Proceedings of the ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, 1998

1997

Exploiting Dead Value Information.

Milo M. K. Martin, Amir Roth, Charles N. Fischer

Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, 1997