Amir Nahir

IEEE Trans. Parallel Distributed Syst., 2016

Reversing the supermarket: A distributed approach for handling elasticity in the cloud.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE/IFIP Network Operations and Management Symposium, 2016

2015

Workload Factoring: A Game-Theoretic Perspective.

[BibT_eX]

[DOI]

IEEE/ACM Trans. Netw., 2015

Solutions to IBM POWER8 verification challenges.

[BibT_eX]

[DOI]

IBM J. Res. Dev., 2015

Debugging post-silicon fails in the IBM POWER8 bring-up lab.

[BibT_eX]

[DOI]

IBM J. Res. Dev., 2015

Resource allocation and management in Cloud Computing.

[BibT_eX]

[DOI]

Proceedings of the IFIP/IEEE International Symposium on Integrated Network Management, 2015

Comparative study of test generation methods for simulation accelerators.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014

Design and management of complex distributed systems: optimization and game-theoretic perspectives.

[BibT_eX]

[DOI]

PhD thesis, 2014

Topology Design of Communication Networks: A Game-Theoretic Perspective.

[BibT_eX]

[DOI]

Ari Freund

IEEE/ACM Trans. Netw., 2014

Effective post-silicon failure localization using dynamic program slicing.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Post-Silicon Validation of the IBM POWER8 Processor.

[BibT_eX]

[DOI]

Klaus-Dieter Schubert

Keith Sharp

Greg Wetli

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Verification of Transactional Memory in POWER8.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013

Dynamic Selection of Trace Signals for Post-Silicon Debug.

[BibT_eX]

[DOI]

Proceedings of the 14th International Workshop on Microprocessor Test and Verification, 2013

Schedule first, manage later: Network-aware load balancing.

[BibT_eX]

[DOI]

Proceedings of the IEEE INFOCOM 2013, Turin, Italy, April 14-19, 2013, 2013

Hybrid checking for microarchitectural validation of microprocessor designs on acceleration platforms.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

Improving Post-silicon Validation Efficiency by Using Pre-generated Data.

[BibT_eX]

[DOI]

Proceedings of the Hardware and Software: Verification and Testing, 2013

2012

Concurrent Generation of Concurrent Programs for Post-Silicon Validation.

[BibT_eX]

[DOI]

Allon Adir

Avi Ziv

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

Workload factoring with the cloud: A game-theoretic perspective.

[BibT_eX]

[DOI]

Proceedings of the IEEE INFOCOM 2012, Orlando, FL, USA, March 25-30, 2012, 2012

Leveraging Accelerated Simulation for Floating-Point Regression.

[BibT_eX]

[DOI]

Proceedings of the Hardware and Software: Verification and Testing, 2012

Emulation in post-silicon validation: It's not just for functionality anymore.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International High Level Design Validation and Test Workshop, 2012

Approximating checkers for simulation acceleration.

[BibT_eX]

[DOI]

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Distributed oblivious load balancing using prioritized job replication.

[BibT_eX]

[DOI]

Proceedings of the 8th International Conference on Network and Service Management, 2012

nuTAB-BackSpace: Rewriting to Normalize Non-determinism in Post-silicon Debug Traces.

[BibT_eX]

[DOI]

Flavio M. de Paula

Alan J. Hu

Proceedings of the Computer Aided Verification - 24th International Conference, 2012

Optimizing test-generation to the execution platform.

[BibT_eX]

[DOI]

Avi Ziv

Subrat Panda

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011

A unified methodology for pre-silicon verification and post-silicon validation.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

TAB-BackSpace: unlimited-length trace buffers with zero additional on-chip overhead.

[BibT_eX]

[DOI]

Proceedings of the 48th Design Automation Conference, 2011

Leveraging pre-silicon verification resources for the post-silicon validation of the IBM POWER7 processor.

[BibT_eX]

[DOI]

Proceedings of the 48th Design Automation Conference, 2011

Threadmill: a post-silicon exerciser for multi-threaded processors.

[BibT_eX]

[DOI]

Proceedings of the 48th Design Automation Conference, 2011

2010

On cost-aware monitoring for self-adaptive load sharing.

[BibT_eX]

[DOI]

IEEE J. Sel. Areas Commun., 2010

Reaching Coverage Closure in Post-silicon Validation.

[BibT_eX]

[DOI]

Proceedings of the Hardware and Software: Verification and Testing, 2010

Bridging pre-silicon verification and post-silicon validation.

[BibT_eX]

[DOI]

Proceedings of the 47th Design Automation Conference, 2010

2009

Functional verification of power gated designs by compositional reasoning.

[BibT_eX]

[DOI]

Cindy Eisner

Karen Yorav

Formal Methods Syst. Des., 2009

Topology Design and Control: A Game-Theoretic Perspective.

[BibT_eX]

[DOI]

Ari Freund

Proceedings of the INFOCOM 2009. 28th IEEE International Conference on Computer Communications, 2009

2007

Cost Aware Adaptive Load Sharing.

[BibT_eX]

[DOI]

Proceedings of the Self-Organizing Systems, Second International Workshop, 2007

Using the Right Amount of Monitoring in Adaptive Load Sharing.

[BibT_eX]

[DOI]

Proceedings of the Fourth International Conference on Autonomic Computing (ICAC'07), 2007

On Fully Distributed Adaptive Load Balancing.

[BibT_eX]

[DOI]

Proceedings of the Managing Virtualization of Networks and Services, 2007

2006

Using Linear Programming Techniques for Scheduling-Based Random Test-Case Generation.

[BibT_eX]

[DOI]