Amir Amin

According to our database1, Amir Amin authored at least 14 papers between 2011 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2016
An Energy-Efficient Reconfigurable ASIP Supporting Multi-mode MIMO Detection.
J. Signal Process. Syst., 2016

2014
Towards approaching near-optimal MIMO detection performance ONAC-programmable baseband processor.
Proceedings of the IEEE International Conference on Acoustics, 2014

2013
Exploration of Full HD Media Decoding on a Software Defined Radio Baseband Processor.
IEEE Trans. Signal Process., 2013

Exploration of Lattice Reduction Aided Soft-Output MIMO Detection on a DLP/ILP Baseband Processor.
IEEE Trans. Signal Process., 2013

Design Flow for Silicon Chip Implementing Novel Platform Architecture for Wireless Communication.
Int. J. Embed. Real Time Commun. Syst., 2013

A unified receiver signal processing architecture for all modes of the DTMB broadcasting system.
Proceedings of the 24th IEEE Annual International Symposium on Personal, 2013

Processor based 20Mhz 4×4 Cat-5 LTE MIMO receiver with advanced detectors.
Proceedings of the IEEE International Conference on Acoustics, 2013

A C-programmable baseband processor with inner modem implementations for LTE Cat-4/5/7 and Gbps 80MHz 4×4 802.11ac (invited).
Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013

2012
Algorithm-Architecture Co-Optimization of Area-Efficient SDR Baseband for Highly Diversified Digital TV Standards.
Proceedings of the 75th IEEE Vehicular Technology Conference, 2012

Exploration of Full HD Media Decoding on SDR Baseband Processor.
Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

A flexible platform architecture for Gbps wireless communication.
Proceedings of the 2012 International Symposium on System on Chip, 2012

2011
Overview of a Software Defined Downlink Inner Receiver for Category-E LTE-Advanced UE.
Proceedings of IEEE International Conference on Communications, 2011

Scalable Block-Based Parallel Lattice Reduction Algorithm for an SDR Baseband Processor.
Proceedings of IEEE International Conference on Communications, 2011

Hybrid lattice reduction algorithm and its implementation on an SDR baseband processor for LTE.
Proceedings of the 19th European Signal Processing Conference, 2011


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