Amila Edirisuriya

According to our database, Amila Edirisuriya authored at least 7 papers between 2012 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2017

Fast Algorithms and Architectures for 8-Point DST-II/DST-VII Approximations.

Renato J. Cintra, Fábio M. Bayer, Arjuna Madanayake, Uma Sadhvi Potluri, Amila Edirisuriya

J. Circuits Syst. Comput., 2017

A Single-Channel Architecture for Algebraic Integer Based 8×8 2-D DCT Computation.

Amila Edirisuriya, Arjuna Madanayake, Renato J. Cintra, Vassil S. Dimitrov

CoRR, 2017

A Digital Hardware Fast Algorithm and FPGA-based Prototype for a Novel 16-point Approximate DCT for Image Compression Applications.

Fábio M. Bayer, Renato J. Cintra, Amila Edirisuriya, Arjuna Madanayake

CoRR, 2017

2014

Improved 8-Point Approximate DCT for Image and Video Compression Requiring Only 14 Additions.

Uma Sadhvi Potluri, Arjuna Madanayake, Renato J. Cintra, Fábio M. Bayer, Sunera Kulasekera, Amila Edirisuriya

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

2013

A Single-Channel Architecture for Algebraic Integer-Based 8 × 8 2-D DCT Computation.

Amila Edirisuriya, Arjuna Madanayake, Renato J. Cintra, Vassil S. Dimitrov, Nilanka T. Rajapaksha

IEEE Trans. Circuits Syst. Video Technol., 2013

Asynchronous Realization of Algebraic Integer-Based 2D DCT Using Achronix Speedster SPD60 FPGA.

Nilanka T. Rajapaksha, Amila Edirisuriya, Arjuna Madanayake, Renato J. Cintra, Denis Onen, Ihab Amer, Vassil S. Dimitrov

J. Electr. Comput. Eng., 2013

2012

A Row-Parallel 8 × 8 2-D DCT Architecture Using Algebraic Integer-Based Exact Computation.

Arjuna Madanayake, Renato J. Cintra, Denis Onen, Vassil S. Dimitrov, Nilanka T. Rajapaksha, Leonard T. Bruton, Amila Edirisuriya

IEEE Trans. Circuits Syst. Video Technol., 2012