Amaury Graillat

According to our database, Amaury Graillat authored at least 7 papers between 2017 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

Bounding the delays of the MPPA network-on-chip with network calculus: Models and benchmarks.

Marc Boyer, Amaury Graillat, Benoît Dupont de Dinechin, Jörn Migge

Perform. Evaluation, 2020

2019

Correct-by-Construction Parallelization of Hard Real-Time Avionics Applications on Off-the-Shelf Predictable Hardware.

Keryan Didier, Dumitru Potop-Butucaru, Guillaume Iooss, Albert Cohen, Jean Souyris, Philippe Baufreton, Amaury Graillat

ACM Trans. Archit. Code Optim., 2019

Response time analysis of dataflow applications on a many-core processor with shared-memory and network-on-chip.

Amaury Graillat, Claire Maiza, Matthieu Moy, Pascal Raymond, Benoît Dupont de Dinechin

Proceedings of the 27th International Conference on Real-Time Networks and Systems, 2019

2018

Génération de code pour un many-core avec des contraintes temps réel fortes. (Code Generation for Multi-Core Processor with Hard Real-Time Constraints).

Amaury Graillat

PhD thesis, 2018

Parallel code generation of synchronous programs for a many-core architecture.

Amaury Graillat, Matthieu Moy, Pascal Raymond, Benoît Dupont de Dinechin

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

Feed-Forward Routing for the Wormhole Switching Network-on-Chip of the Kalray MPPA2 Processor.

Benoît Dupont de Dinechin, Amaury Graillat

Proceedings of the 10th International Workshop on Network on Chip Architectures, 2017

Network-on-chip service guarantees on the kalray MPPA-256 bostan processor.

Benoît Dupont de Dinechin, Amaury Graillat

Proceedings of the 2nd International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems, 2017