Amandeep Kaur
Orcid: 0000-0003-2056-0884Affiliations:
- IIT Delhi, New Delhi, India
According to our database1,
Amandeep Kaur
authored at least 21 papers
between 2016 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
An Intelligent System With Reduced Readout Power and Lightweight CNN for Vision Applications.
IEEE Trans. Circuits Syst. Video Technol., February, 2024
A Dynamic Offset Reduction Technique to Mitigate the Effect of Threshold Mismatch in Energy Efficient Comparators.
IEEE Access, 2024
2023
Circuits Syst. Signal Process., 2023
A Single Capacitor-Based Offset Reduction Technique for Energy-Efficient Dynamic Comparators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023
An Intelligent CMOS Image Sensor System Using Edge Information for Image Classification.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023
2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
An input folding high speed cyclic ADC for column-parallel readout in CMOS image sensors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
On-Array Compressive Acquisition in CMOS Image Sensors Using Accumulated Spatial Gradients.
IEEE Trans. Circuits Syst. Video Technol., 2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021
2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019
2018
A 12-bit, 2.5-bit/cycle, 1 MS/s two-stage cyclic ADC, for high-speed CMOS Image sensors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
An On-Chip Interpolation Based Readout Scheme for Low-Power, High-Speed CMOS Image Sensors.
Proceedings of the 2018 IEEE SENSORS, New Delhi, India, October 28-31, 2018, 2018
2017
Proceedings of the International SoC Design Conference, 2017
2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016