Alvin Li

Orcid: 0000-0003-4925-9999

According to our database1, Alvin Li authored at least 8 papers between 2012 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
A 0.9-5.8-GHz Software-Defined Receiver RF Front-End With Transformer-Based Current-Gain Boosting and Harmonic Rejection Calibration.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A 4-Element 60-GHz CMOS Phased-Array Receiver With Beamforming Calibration.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

A Spur-and-Phase-Noise-Filtering Technique for Inductor-Less Fractional-N Injection-Locked PLLs.
IEEE J. Solid State Circuits, 2017

2016
An inductor-less fractional-N injection-locked PLL with a spur-and-phase-noise filtering technique.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2014
A 21-48 GHz Subharmonic Injection-Locked Fractional-N Frequency Synthesizer for Multiband Point-to-Point Backhaul Communications.
IEEE J. Solid State Circuits, 2014

2013
A 4-Path 42.8-to-49.5 GHz LO Generation With Automatic Phase Tuning for 60 GHz Phased-Array Receivers.
IEEE J. Solid State Circuits, 2013

A CMOS 21-48GHz fractional-N synthesizer employing ultra-wideband injection-locked frequency multipliers.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012
A 4-path 42.8-to-49.5GHz LO generation with automatic phase tuning for 60GHz phased-array receivers.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012


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