Alvernon Walker

According to our database, Alvernon Walker authored at least 12 papers between 1992 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Integrating Support Vector Machine Models into the Engineering Lifecycle Design Roadmap Process for Innovative Practices using Project Based Learning.

Willie L. Brown, Ibibia Dabipi, Dinesh K. Sharma, Lei Zhang, Weiwei Zhu-Stone, Lanju Mei, Alvernon Walker, Tiara T. Cornelius, Jason Cornelius, Urban T. Wiggins, Etahe Johnson, Lakeisha Harris, John P. Murray, Enrique Jackson, Terence H. Fontaine, Linda B. Hayden

Proceedings of the IEEE Frontiers in Education Conference, 2022

Research-to-Practice for Peer-to-Peer Learning in Engineering Education using Ensemble Methods to Deploy a Lifecycle Design Roadmap.

Willie L. Brown, Ibibia Dabipi, Dinesh K. Sharma, Lei Zhang, Weiwei Zhu-Stone, Lanju Mei, Alvernon Walker, Tiara T. Cornelius, Jason Cornelius, Urban T. Wiggins, Etahe Johnson, Lakeisha Harris, John P. Murray, Enrique Jackson, Terence H. Fontaine, Linda B. Hayden

Proceedings of the IEEE Frontiers in Education Conference, 2022

2001

A Fine Grain Configurable Logic Block for Self-checking FPGAs.

Parag K. Lala, Alvernon Walker

VLSI Design, 2001

A Step Response Based Mixed-Signal BIST Approach .

Alvernon Walker

Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001

On-Line Error Detectable Carry-Free Adder Design.

Parag K. Lala, Alvernon Walker

Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001

A Unified Scheme for Designing Testable State Machines.

Parag K. Lala, Alvernon Walker

Proceedings of the 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan, 2001

2000

A Transition Based BIST Approach for Passive Analog Circuits.

Alvernon Walker, Parag K. Lala

Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000

An On-Line Reconfigurable FPGA Architecture.

Parag K. Lala, Alvernon Walker

Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 2000

1999

A CMOS-Based Logic Cell for the Implementation of Self-Checking FPGAs.

Parag K. Lala, Anup Singh, Alvernon Walker

Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '99), 1999

1998

On Self-Checking Design of CMOS Circuits for Multiple Faults.

Fadi Busaba, Parag K. Lala, Alvernon Walker

VLSI Design, 1998

1997

An approach for detecting bridging faults in CMOS domino logic circuits using dynamic power supply current monitoring.

Alvernon Walker, Algernon P. Henry, Parag K. Lala

Proceedings of the 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems (DFT '97), 1997

1992

Fault Diagnosis in Analog Circuits Using Element Modulation.

Alvernon Walker, Winser E. Alexander, Parag K. Lala

IEEE Des. Test Comput., 1992