Almutaz Adileh

Orcid: 0000-0002-4656-6523

According to our database1, Almutaz Adileh authored at least 13 papers between 2012 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Links

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Bibliography

2020
MDM: The GPU Memory Divergence Model.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

2019
Modeling Emerging Memory-Divergent GPU Applications.
IEEE Comput. Archit. Lett., 2019

Precise Runahead Execution.
IEEE Comput. Archit. Lett., 2019

Racing to Hardware-Validated Simulation.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2019

Adaptive memory-side last-level GPU caching.
Proceedings of the 46th International Symposium on Computer Architecture, 2019

2018
Architectural Support for Probabilistic Branches.
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

2017
LA-LLC: Inter-Core Locality-Aware Last-Level Cache to Exploit Many-to-Many Traffic in GPGPUs.
IEEE Comput. Archit. Lett., 2017

Mind The Power Holes: Sifting Operating Points in Power-Limited Heterogeneous Multicores.
IEEE Comput. Archit. Lett., 2017

2016
Maximizing Heterogeneous Processor Performance Under Power Constraints.
ACM Trans. Archit. Code Optim., 2016

2014
A Case for Specialized Processors for Scale-Out Workloads.
IEEE Micro, 2014

2012
Quantifying the Mismatch between Emerging Scale-Out Applications and Modern Processors.
ACM Trans. Comput. Syst., 2012

Scale-out processors.
Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), 2012

Clearing the clouds: a study of emerging scale-out workloads on modern hardware.
Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems, 2012


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